op-amp configurations... is this circuit performs as voltager follower??

[Anniyan_x]

View attachment 64984

hi refering to the circuit above:-

im quite confuse on what does it really do and the purpose..as it has a feedback.. i presume it is a voltager follower circuit to act as a buffer for the incoming signal, meaning the volatage at AI2 and A2_C+ should be the same, but when i measure it is somehow difference, the circuit is a part of {analog signal chain} of a analog input card which have a active mode(card has own supply for sensor) and passive mode(sensor powered externaly)

 

[Nigel Goodwin]

Yes, it's just a buffer, but with an attenuator on the front.

 

[Winterstone]

View attachment 64984

hi refering to the circuit above:-

im quite confuse on what does it really do and the purpose..as it has a feedback.. i presume it is a voltager follower circuit to act as a buffer for the incoming signal, meaning the volatage at AI2 and A2_C+ should be the same, but when i measure it is somehow difference, the circuit is a part of {analog signal chain} of a analog input card which have a active mode(card has own supply for sensor) and passive mode(sensor powered externaly)

Hi Anniyan,
Yes, it is a follower - however, the output voltage will be equal (nearly) to the voltage directly at the pos. opamp input, which is different from your signal input (due to lowpass filtering at the input).

 

[Anniyan_x]

Yes, it's just a buffer, but with an attenuator on the front.

Hi Anniyan,
Yes, it is a follower - however, the output voltage will be equal (nearly) to the voltage directly at the pos. opamp input, which is different from your signal input (due to lowpass filtering at the input).

so in that case how do i calculate the gain, is it Vout/Vin in sense here it would be [AI_C2+/ V+lnB ], and then the resistor in the feedback is (7.5k).. is the purpose of this resistor is just to feed current to the amp (current feedback) or the value of the resistor can be change to adjust the gain??

for e.g the voltage at AI2 is 8.96v(signal input) after passing the filter/divider circuit it drops to 2.265v(opamp input) and then at the AI_C2+ i get about 2.274v.... so this (2.274v) is feebacked to the amp again with a 7.5k resistor is series...so adjusting the resistor should able to control the voltage at the AI_C2+ right?? the output signal is then feed to a ADC with 2.5vref.

 

[crutschow]

The purpose of the 7.5k resistor is just to help reduce the output offset voltage due to the small input bias current of the op amp. It carries no other current. For this purpose it normally is set equal to the equivalent input resistance at the other input (for the values you show it should actually be 4.0K not 7.5K). It has no significant effect on the op amp gain and can be ignored in the gain calculations.

 

[Anniyan_x]

The purpose of the 7.5k resistor is just to help reduce the output offset voltage due to the small input bias current of the op amp. It carries no other current. For this purpose it normally is set equal to the equivalent input resistance at the other input (for the values you show it should actually be 4.0K not 7.5K). It has no significant effect on the op amp gain and can be ignored in the gain calculations.

oh i see, anyway to calculate the input resistance of the other input(the non-iverting side), first i need to calculate the total resistance of the circuit which like a voltage divider with the cap in parrallel, so i need to calculate the impendance of (Xc) of the cap which is Xc = 1/2nfC, right? (n = pai) but how to find out the frequency?? can u show me the formula u used to calculate the input resistance of 4.0k...

 

[Winterstone]

can u show me the formula u used to calculate the input resistance of 4.0k...

The input bias current - mentioned by crutschow - is a dc current. Thus, there is no need to calculate impedances.
As mentioned also by chrutschow, it should be R212=R213.
However, he also mentioned that this "calculation" is not to important. Why not? Because it assumes that both input dc bias currents are equal. However, nobody knows and nobody needs to know.!
Thus, it is completely sufficient (and engineering like) to select these both resistors with approximately equal values.

 

[crutschow]

oh i see, anyway to calculate the input resistance of the other input(the non-iverting side), first i need to calculate the total resistance of the circuit which like a voltage divider with the cap in parrallel, so i need to calculate the impendance of (Xc) of the cap which is Xc = 1/2nfC, right? (n = pai) but how to find out the frequency?? can u show me the formula u used to calculate the input resistance of 4.0k...

The equivalent resistance at the op amp plus input is R211 in parallel with R212 or (34.8k*4.43k)/(34.8k+4.43K) = 4.01K. This assumes that the input is an ideal voltage source with essentially zero resistance to ground (such as the output of another op amp).

 

[WTP Pepper]

The output capacitor could cause instabilty as it is being driven straight off the op-amp output without any current limiting. In an ideal circuit it would have no function whatsoever as the ideal output impedance of the op-amp is zero. However in reality, it could dip the power supply as the cap charges and discharges.

 

[Winterstone]

The output capacitor could cause instabilty as it is being driven straight off the op-amp output without any current limiting. In an ideal circuit it would have no function whatsoever as the ideal output impedance of the op-amp is zero. However in reality, it could dip the power supply as the cap charges and discharges.

I think, it CAN possibly cause stability problems (lowering the phase margin) but not necessarily "cause instability".
Moreover, I think the reason for this effect has nothing to do with missing current limiting. It is simply an extra pole that is created by Rout*Cload.

 

[lebevti]

The output capacitor could cause instabilty as it is being driven straight off the op-amp output without any current limiting. In an ideal circuit it would have no function whatsoever as the ideal output impedance of the op-amp is zero. However in reality, it could dip the power supply as the cap charges and discharges.

what power supply? the one that gives the op-amp rail supplies? how is that affected by C213??

and a more general question, what really is the purpose of C213? could you explain better the charging and discharging of that capacitor?

 

[WTP Pepper]

In my book anything that causes stability problems cause instability. Or have I missed something in your reply?

 

[Winterstone]

In my book anything that causes stability problems cause instability. Or have I missed something in your reply?

In my opinion, "stability problems" are not identical to "instability". Rather, "stability problems" can mean that the step response exhibits ringing (decaying oscillations) due to a small phase margin.
However, the circuit is still stable - according to the final value theorem.

 

[Anniyan_x]

what power supply? the one that gives the op-amp rail supplies? how is that affected by C213??

and a more general question, what really is the purpose of C213? could you explain better the charging and discharging of that capacitor?

In my opinion, "stability problems" are not identical to "instability". Rather, "stability problems" can mean that the step response exhibits ringing (decaying oscillations) due to a small phase margin.
However, the circuit is still stable - according to the final value theorem.

Hi all, basically my problem is this..il explain it: i have Analog input Card (4ma-20ma) which had a CPLD in it which become obsolete. so it was change to just IC, few IC's to stimulate the same circuit as in the CPLD. anyway this modifications should not disturb the analog part as it is isolated by optocoulers.

So what happen is, The AIM card have active mode (in which the sensor connected will be powered by internal AIM board Isolated 24vdc power supply) and another mode:- passive mode (in which the AIM card will be powered by the external power supply)


now after the modification the new board (without the CPLD) have this "instability" problem when used, while the old board is more stabil, although the ANALOG CIRCUITRY are the same. i dono why

after measure all the signal:- along the analog signal chain, this what i got:- refer the table i attached below in forum:- (this reading taken at the op-amp(follower) which i attached at the first message.

seems all the voltage are consistent along the analog signal chain until reach this voltage follower op-amp circuit where the input and output is not same.

View attachment 65139

so now yes im having instability problem where the voltage follower op-amp have slight difference in between the input voltage and output volatage, and because the ADC resolution is very high..small variations also giving me different results..although the board is injected with same analog input current.(4-20ma)

when use in active only the voltage follower op-amp have higher variance between Vin and Vout, so basically let say i calibrate the board using active mode when i switch to passive mode i need to re-calibrate again...but logically i just need calibrate one time in either 1 of the modes.


so is it good idea the remove the C213 capacitor, anyway il try remove it and retest again..see what i get.

 

[Winterstone]

so is it good idea the remove the C213 capacitor, anyway il try remove it and retest again..see what i get.

Remove C213? Do you have the chance to "remove" it?
In this case, one must ask: Why did you include this capacitive load from the beginning - when it is not a load that you have to live with?

 

[Anniyan_x]

Remove C213? Do you have the chance to "remove" it?
In this case, one must ask: Why did you include this capacitive load from the beginning - when it is not a load that you have to live with?

the circuit was already design by other people..im just using it..so when the digital part was redesign, suddenly got this problem...anyway after remove it the voltage at vout A1_C2+, is slightly lower than the Vin as opposed to the circuit where the c213 is attached. but still the voltage not stabil..

 

[Winterstone]

Anniyan,
if I rememeber well, you didn't tell us up to now which frequencies you are going to use.
Therefore, three questions:
1.) Signal frequencies?
2.) Did you have already a look into the data sheet? (Poor slew rate and rather small gain-bandwidth product).
3.) What do you mean with "voltage not stable"? What kind of instability? What do you observe?

 

[Anniyan_x]

Anniyan,
if I rememeber well, you didn't tell us up to now which frequencies you are going to use.
Therefore, three questions:
1.) Signal frequencies?
2.) Did you have already a look into the data sheet? (Poor slew rate and rather small gain-bandwidth product).
3.) What do you mean with "voltage not stable"? What kind of instability? What do you observe?

hi winterstone

according to your ques:-

1) the input to the op-amp at AI2 is a DC only..how do i can know the frequency??

2)il look into this....

3) what i mean is according no my post #14, the are 2 modes active and passive, and i have the option to calibrate the board in-either mode to get the reading.I should only calibrate once. SO if i calibrate in active mode, and then swicth to passive mode... the output of the op-amp is different already, so i need to re-calibrate the board in passive again to get accurate reading. <- this what i mean voltage not stable, in-between the 2 modes! which i believe although in passive or active mode, the output of the voltage follower circuit should be almost similiar because both mode have the same 4~20ma current input,only different is the power source. other that the op-amp voltages are stabil in-sense they never change much.


active mode:- board have internal isolated 24vdc to power
passive:- external power supply must be used

i used a fluke processmeter787 to calibrate the board.

 

[Winterstone]

I must confess, it seems that I did misunderstand something - caused by the terms "stability" and "instability" used in the previous postings.
Most probably, your problems have nothing to do with the classical "system instability" caused by feedback loops. Instead, you "only" observe two different states which should be equal in theory, right?
So I have to reconsider the whole problem.
W.

 

[crutschow]

...............................
3) what i mean is according no my post #14, the are 2 modes active and passive, and i have the option to calibrate the board in-either mode to get the reading.I should only calibrate once. SO if i calibrate in active mode, and then swicth to passive mode... the output of the op-amp is different already, so i need to re-calibrate the board in passive again to get accurate reading. <- this what i mean voltage not stable, in-between the 2 modes! which i believe although in passive or active mode, the output of the voltage follower circuit should be almost similiar because both mode have the same 4~20ma current input,only different is the power source. other that the op-amp voltages are stabil in-sense they never change much.
....................

The terms "unstable", "different", "active", and "passive" are not sufficient to understand your problem. You need to post your circuit configuration and state the value of all the voltages you are measuring for both the active and passive modes. Otherwise we are just guessing.