op-amp configurations... is this circuit performs as voltager follower??

Winterstone said:

I must confess, it seems that I did misunderstand something - caused by the terms "stability" and "instability" used in the previous postings.
Most probably, your problems have nothing to do with the classical "system instability" caused by feedback loops. Instead, you "only" observe two different states which should be equal in theory, right?
So I have to reconsider the whole problem.
W.

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YUP.. and the other thing is the problem only comes up in the new board which in the CPLD have been removed and changed to IC's, in the old board the difference is smaller between the 2states so it is ignorable(here, i mean after the ADC conversion).. i have added a new measurement result and the indicate the places in took the measurement..u can see at my post no 22. maybe u can get some ideas. the difference in measurement was in at the op-amp(voltage follower)..so i thought something wrong here.

crutschow said:

The terms "unstable", "different", "active", and "passive" are not sufficient to understand your problem. You need to post your circuit configuration and state the value of all the voltages you are measuring for both the active and passive modes. Otherwise we are just guessing.

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hi all here i attached the results of both the boards at both modes.. the difference between the 2 boards is the old board have a CPLD in it, and in the new boards the CPLD have been removed and replaced by standard IC'c which perform the samething. about 8 IC's where added. anyway the analog part of both the boards are the same. the changes was only in the digital side which is also isolated bu an optocoupler. here is the reading along the analog signal chain between, BOTH boards in BOTH the modes (active/passive):-

in this schematic i measure at channel 3 as previously above post all was at channel2..because i did same somechanges in channel 2 (like removing the load cap) so i post the results of channel3.

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here is the picture explain where the measure voltages are tapped in reference to AGND.(analog ground)

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can it be that the current requirement of the total board have problem in the new boards because now got extra 8 digital ic in where previously in was only 1-ic (a CPLD). i wonder why the analog part got issue although it is same circuit .

i hope the information above can give some ideas to the expreciesce people what might cause the error??

HI all after some tweaks i found that the the voltages difference between both the modes (passive&active) was because of the shifted offset voltages when it is active mode (using internal supply) the virtual ground circuit (thats what it is called i guess, using opamp) has voltages divider on its +input which divide the Vref into half and provides this voltage as an input to virtual ground opamp's +input. This opamp configurations then generates a stable voltage on the -ve input side which is then used as an offset voltage.

so the difference in reading was because this offset is shifted (+0.003v) when using in active mode where by it should not have been shifted. it should be same in both modes.

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has anbody have some hints on this..what might cause the voltage shift.. any common cause which i can investigate first??