oscillator question

[keny]

I am wondering what the deal with oscillator speeds are. This is weird and I want to understand what is happening:

#include <htc.h>
#define MAIN_C

__CONFIG(1, IESODIS & FCMDIS & XT & CPUDIV_4);
__CONFIG(2, BORDIS & PWRTEN & WDTDIS);
__CONFIG(3, MCLREN);
__CONFIG(4, XINSTDIS & STVRDIS & LVPDIS & DEBUGDIS); 

// PIC18lf13k50
// 12Mhz Crystal

void main(void){

	ADCON1 = 0x0F;			// Turn Off A/D's
	TRISC = 0b00000000; // Set PORTC to output
	PORTC = 0b00000000;	// Clear PORTB port


	while(1)
	{

		RC5 = 1;
		RC5 = 0;

	} 
}

ok. if I do that My 20 Mhz oscilloscope shows two solid lines with the time division on it's highest setting. 0 volts solid 3 volts fuzzy. When I measure the pin with a voltage meter it registers .76 volts.

I was using a Pic 18f2450 with the same crystal and not having issues like this. (coincidentally, it is behaving the same way using the internal clock.) I also tried using a PIC16f684 and had a similar outcome.

is this a case of "How do I slow the clock down so I can actually use the chip?" I'm driving 74HC595's for the time being and they need 2volts.

These are the options MPLAB gives me from the include file:

// Configuration Bit Values

// Configuration register 1
// Internal/External Switch Over
 #define IESOEN		0x7FFF 	// Internal/External switch over mode enabled 
 #define IESODIS	0xFFFF 	// Internal/External switch over mode disabled 
// Failsafe Clock Monitor
 #define FCMEN		0xBFFF 	// enabled 
 #define FCMDIS		0xFFFF 	// disabled 
// Primary Clock Enable
 #define PCLKEN		0xFFFF 	// enabled 
 #define PCLKDIS	0xDFFF 	// under software control 
// 4 x PLL enable
 #define PLLEN		0xEFFF 	// Oscillator multiplied by 4 
 #define PLLDIS		0xFFFF 	// PLL is under software control 
// Oscillator Selection
 #define EXTCLKO	0xF7FF 	// External RC, OSC2=CLKOUT 
 #define ECLOW		0xF5FF 	// EC (low) 
 #define ECLOWCLKO	0xF4FF 	// EC, CLKOUT function on OSC2 (low) 
 #define ECMED		0xF3FF 	// EC (medium) 
 #define ECMEDCLKO	0xF2FF 	// EC, CLKOUT function on OSC2 (medium) 
 #define RCCLKO		0xF1FF 	// Internal RC, OSC2=CLKOUT 
 #define RCIO		0xF0FF 	// Internal RC, OSC2=IO 
 #define EXTIO		0xFFFF 	// External RC, OSC2=IO 
 #define ECIO		0xFDFF 	// EC, OSC2=IO 
 #define ECCLKO		0xFCFF 	// EC, OSC2=CLKOUT 
 #define HS		0xFAFF 	// HS osc 
 #define XT		0xF9FF 	// XT osc 
 #define LP		0xF8FF 	// LP osc 

#define	USBDIV_2	0xFFDF
#define USBDIV_0	0xFFFF
#define CPUDIV_4	0xFFE7
#define CPUDIV_3	0xFFF7
#define CPUDIV_2	0xFFEF
#define CPUDIV_0	0xFFFF

The data sheet seems to alude that there are more cpu divisions possible but I am unsure how to get here from there. If I understood why the 2450 seems to work maybe I'd get why these other chips don't.

Any help is appreciated!