Jony, the period of the time delay is given by RZ charging both C1 and C2 together in parallel, until C1 voltage reaches 5.6v.
The reason C2 has a larger effect on the time delay (as Skyhawk said) is because with a larger value of C2, it causes C1 to be discharged to a lower voltage during the turn-off phase of the buck. This I think was Skyhawk's premise regarding the "timing" being controlled by C2.
However in my design there is an optimal discharge voltage for C1. If C1 is discharged too much it places a larger -Vbe voltage on Q1 regulator transistor, which is not good for reliability as small signal NPNs do not like a large reverse voltage b-e.
And if C1 is not discharged far enough, the overall delay time is reduced, and to compensate it is necessary to use a higher resistance for RZ, which will start to compromise zener current and Q2 base current, both hurting SMPS efficiency and regulation.
I settled on a C1 discharge range of 5.6v-3v, as being optimal. This discharge of 2.6v gives only 2.0v -Vbe, quite safe for Q2, but the 2.6v differential is enough to give a reliable time delay for later charging.
My recommendation to increase the RC delay is to increase both C1 and C2 as a pair keeping them in roughly the same ratio of C1:C2. So RZ is not changed, maintaining the required Z and Q2 currents, and the only thing changed is the total delay time.
As for the time delay principle, there are two factors;
1). The amount C1 is discharged is based on the size of C2 (compared to C1) AND on Vin. If either is larger C1 will be discharged further.
2). The actual RC delay that affects the SMPS freq is based on the distance C1 has to charge and the RC constant based on RZ into both C1+C2 in parallel.
Note that if the Vin is changed significantly the ratio of C1:C2 needs to be altered to again put C1 discharge delta back in the optimal 2.6v range. The C1:C2 ratios in my circuits were chosen to suit the expected Vin range (like the automotive range 11v-14.5v).
Skyhawk said:
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While I am disappointed that the frequency was not cut in half by doubling the value of C2, I am glad to see a large shift in contrast with a previous report. ...
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Both the inductor AND the RC delay period have an effect on frequency so doubling the RC delay period won't halve the frequency. Also, C2 changed by itself won't have a perfectly linear effect on the total RC time, even though it has a larger effect on the RC period than C1 does as you said.
If the RC delay chosen is too large, the freq is slowed too much and the inductor pushes close to saturation causing poor efficiency. A good balance of RC delay can be found where the L1 current ripple is reasonably low, and near this point the inductor has quite a large effect on frequency, maybe responsible for 60%.