Styx
Active Member
OK all I thought I would spread the wealth and let a few ppl here know abt somethin gI have come across
Progamming PIC's in Python!!!
If you do not know what python is, it is a fantastic language (described as a self-commented language). It is extreamly good and fast in writing something.
Some argue that since it is an interpreted language (ie a script-language) it is slow. This isn't really true since the majority of the back-end to PYTHON is written in C, thus you could concider PYTHON to be more of a wrapper language
Anyway enough of the sales blurb
http://pyastra.sourceforge.net/
EXAMPLE
Sure you can write for PIC's in C but C isn't really a nice language (yes alot better then ASSEMBLER) but it is prone to coding errors and length (PYTHON isnt)
Also you can generate Verilog (and to some extent VHDL) using python
**broken link removed**
PYTHON is general is extreamly useful to me (Gentoo user as well as using it to replace MATLAB) but since I code in VHDL in between using a soldering iron the myHDL looks very interesting, but I can across the PIC thing since a board a collegue is working on will have a PIC so I am going to hi-jack it
Progamming PIC's in Python!!!
If you do not know what python is, it is a fantastic language (described as a self-commented language). It is extreamly good and fast in writing something.
Some argue that since it is an interpreted language (ie a script-language) it is slow. This isn't really true since the majority of the back-end to PYTHON is written in C, thus you could concider PYTHON to be more of a wrapper language
Anyway enough of the sales blurb
http://pyastra.sourceforge.net/
EXAMPLE
As Python said:while(1):
PORTA[0] = 1
for i in xrange(0,255):
pass
PORTA[0] = 0
for i in xrange(0,255):
pass
As Assembler said:;
; Generated by pyastra 0.0.1
; infile: led_blink.py
;
processor 16c432
#include p16c432.inc
_lshift_left equ 0x20 ;bank 0
_lshift_right equ 0x21 ;bank 0
_rshift_left equ 0x22 ;bank 0
_rshift_right equ 0x23 ;bank 0
_mul_left equ 0x24 ;bank 0
_mul_right equ 0x25 ;bank 0
mul_cntr equ 0x26 ;bank 0
mul_res equ 0x27 ;bank 0
_div_left equ 0x28 ;bank 0
_div_right equ 0x29 ;bank 0
div_cntr equ 0x2a ;bank 0
div_buf equ 0x2b ;bank 0
_mod_left equ 0x2c ;bank 0
_mod_right equ 0x2d ;bank 0
mod_cntr equ 0x2e ;bank 0
mod_buf equ 0x2f ;bank 0
_pow_left equ 0x30 ;bank 0
_pow_right equ 0x31 ;bank 0
pow_res equ 0x32 ;bank 0
pow_buf equ 0x33 ;bank 0
pow_cntr equ 0x34 ;bank 0
stack0 equ 0x35 ;bank 0
_i equ 0x36 ;bank 0
stack1 equ 0x37 ;bank 0
stack2 equ 0x38 ;bank 0
stack3 equ 0x39 ;bank 0
stack4 equ 0x3a ;bank 0
org 0x0
goto main
org 0x5
main
label0
movlw 0x1
bcf STATUS, RP0
movwf stack0
bcf STATUS, RP0
btfsc STATUS, Z
goto label1
bcf STATUS, RP0
bsf PORTA, 0
bcf STATUS, RP0
clrf _i
movlw 0xff
bcf STATUS, RP0
movwf stack2
bcf STATUS, RP0
movwf st
label2
bcf STATUS, RP0
movf stack1, w
bcf STATUS, RP0
subwf _i, w
bcf STATUS, RP0
btfsc STATUS, Z
goto label3
bcf STATUS, RP0
btfsc STATUS, C
goto label3
label4
bcf STATUS, RP0
incf _i, f
goto label2
label3
bcf STATUS, RP0
bcf PORTA, 0
bcf STATUS, RP0
clrf _i
movlw 0xff
bcf STATUS, RP0
movwf stack4
bcf STATUS, RP0
movwf stack3
label5
bcf STATUS, RP0
movf stack3, w
bcf STATUS, RP0
subwf _i, w
bcf STATUS, RP0
btfsc STATUS, Z
goto label6
bcf STATUS, RP0
btfsc STATUS, C
goto label6
label7
bcf STATUS, RP0
incf _i, f
goto label5
label6
goto label0
label1
goto $
end
Sure you can write for PIC's in C but C isn't really a nice language (yes alot better then ASSEMBLER) but it is prone to coding errors and length (PYTHON isnt)
Also you can generate Verilog (and to some extent VHDL) using python
**broken link removed**
PYTHON is general is extreamly useful to me (Gentoo user as well as using it to replace MATLAB) but since I code in VHDL in between using a soldering iron the myHDL looks very interesting, but I can across the PIC thing since a board a collegue is working on will have a PIC so I am going to hi-jack it