/*
* File: blink32.c
* Author: Jason
*
* Created on February 27, 2014, 5:23 PM
*/
#include <stdio.h>
#include <stdlib.h>
#include <xc.h>
#pragma config PMDL1WAY = OFF,IOL1WAY = OFF , WINDIS = OFF,ICESEL = ICS_PGx1,FWDTEN = OFF
#pragma config FPLLIDIV = DIV_2, FPLLMUL = MUL_24, FPLLODIV = DIV_2,FNOSC = PRIPLL,POSCMOD = XT,FPBDIV = DIV_1 // OSC
#pragma config UPLLIDIV = DIV_2,UPLLEN = ON, //USB OSC
/*
*
*/
void main ()
{
}
#pragma config UPLLEN = ON // USB PLL Enabled
#pragma config FPLLMUL = MUL_15 // PLL Multiplier
#pragma config UPLLIDIV = DIV_2 // USB PLL Input Divider
#pragma config FPLLIDIV = DIV_2 // PLL Input Divider
#pragma config FPLLODIV = DIV_1 // PLL Output Divider
#pragma config FPBDIV = DIV_1 // Peripheral Clock divisor
#pragma config FWDTEN = OFF // Watchdog Timer
#pragma config WDTPS = PS1 // Watchdog Timer Postscale
#pragma config FCKSM = CSDCMD // Clock Switching & Fail Safe Clock Monitor
#pragma config OSCIOFNC = OFF // CLKO Enable
#pragma config POSCMOD = HS // Primary Oscillator
#pragma config IESO = OFF // Internal/External Switch-over
#pragma config FSOSCEN = OFF // Secondary Oscillator Enable (KLO was off)
#pragma config FNOSC = PRIPLL // Oscillator Selection
#pragma config CP = OFF // Code Protect
#pragma config BWP = OFF // Boot Flash Write Protect
#pragma config PWP = OFF // Program Flash Write Protect
#pragma config ICESEL = ICS_PGx2 // ICE/ICD Comm Channel Select
Operating Conditions
• 2.3V to 3.6V, -40ºC to +105ºC, DC to 40 MHz
• 2.3V to 3.6V, -40ºC to +85ºC, DC to 50 MHz
Core: 50 MHz/83 DMIPS MIPS32® M4K®
// DEVCFG3
// USERID = No Setting
#pragma config PMDL1WAY = ON // Peripheral Module Disable Configuration (Allow only one reconfiguration)
#pragma config IOL1WAY = ON // Peripheral Pin Select Configuration (Allow only one reconfiguration)
#pragma config FUSBIDIO = ON // USB USID Selection (Controlled by the USB Module)
#pragma config FVBUSONIO = ON // USB VBUS ON Selection (Controlled by USB Module)
// DEVCFG2
#pragma config FPLLIDIV = DIV_2 // PLL Input Divider (2x Divider) -> 5mhz
#pragma config FPLLMUL = MUL_20 // PLL Multiplier (20x Multiplier) ->100mhz
#pragma config FPLLODIV = DIV_2 // System PLL Output Clock Divider (PLL Divide by 2) ->50mhz
#pragma config UPLLIDIV = DIV_12 // USB PLL Input Divider (12x Divider)
#pragma config UPLLEN = OFF // USB PLL Enable (Disabled and Bypassed)
// DEVCFG1
#pragma config FNOSC = PRIPLL // Oscillator Selection Bits (Primary Osc w/PLL (XT+,HS+,EC+PLL))
#pragma config FSOSCEN = OFF // Secondary Oscillator Enable (Disabled)
#pragma config IESO = ON // Internal/External Switch Over (Enabled)
#pragma config POSCMOD = EC // Primary Oscillator Configuration (External clock mode) <- 10mhz
#pragma config OSCIOFNC = OFF // CLKO Output Signal Active on the OSCO Pin (Disabled)
#pragma config FPBDIV = DIV_8 // Peripheral Clock Divisor (Pb_Clk is Sys_Clk/8)
#pragma config FCKSM = CSDCMD // Clock Switching and Monitor Selection (Clock Switch Disable, FSCM Disabled)
#pragma config WDTPS = PS1048576 // Watchdog Timer Postscaler (1:1048576)
#pragma config WINDIS = OFF // Watchdog Timer Window Enable (Watchdog Timer is in Non-Window Mode)
#pragma config FWDTEN = OFF // Watchdog Timer Enable (WDT Disabled (SWDTEN Bit Controls))
#pragma config FWDTWINSZ = WISZ_25 // Watchdog Timer Window Size (Window Size is 25%)
// DEVCFG0
#pragma config JTAGEN = OFF // JTAG Enable (JTAG Disabled)
#pragma config ICESEL = ICS_PGx1 // ICE/ICD Comm Channel Select (Communicate on PGEC1/PGED1)
#pragma config PWP = OFF // Program Flash Write Protect (Disable)
#pragma config BWP = OFF // Boot Flash Write Protect bit (Protection Disabled)
#pragma config CP = OFF // Code Protect (Protection Disabled)
/*
* File: blink32.c
* Author: Jason
*
* Created on February 27, 2014, 5:23 PM
*/
#include <stdio.h>
#include <stdlib.h>
#include <xc.h>
#include <plib.h>
#define SYS_FREQ (48000000L)
#pragma config UPLLEN = ON // USB PLL Enabled
#pragma config FPLLMUL = MUL_24 // PLL Multiplier
#pragma config UPLLIDIV = DIV_2 // USB PLL Input Divider
#pragma config FPLLIDIV = DIV_2 // PLL Input Divider
#pragma config FPLLODIV = DIV_1 // PLL Output Divider
#pragma config FPBDIV = DIV_1 // Peripheral Clock divisor
#pragma config FWDTEN = OFF // Watchdog Timer
#pragma config WDTPS = PS1 // Watchdog Timer Postscale
#pragma config FCKSM = CSDCMD // Clock Switching & Fail Safe Clock Monitor
#pragma config OSCIOFNC = OFF // CLKO Enable
#pragma config POSCMOD = HS // Primary Oscillator
#pragma config IESO = OFF // Internal/External Switch-over
#pragma config FSOSCEN = OFF // Secondary Oscillator Enable (KLO was off)
#pragma config FNOSC = PRIPLL // Oscillator Selection
#pragma config CP = OFF // Code Protect
#pragma config BWP = OFF // Boot Flash Write Protect
#pragma config PWP = OFF // Program Flash Write Protect
#pragma config ICESEL = ICS_PGx2 // ICE/ICD Comm Channel Select
void init();
void main ()
{
init();
}
void init()
{
SYSTEMConfig(SYS_FREQ, SYS_CFG_ALL);
OSCConfig(OSC_POSC_PLL, OSC_PLL_MULT_24,OSC_PLL_POST_2,0);
mOSCSetPBDIV( OSC_PB_DIV_1 ); // Configure the PB bus to run at 1/4 the CPU frequency
}
/*
* File: blink32.c
* Author: Jason
*
* Created on February 27, 2014, 5:23 PM
*/
#include <stdio.h>
#include <stdlib.h>
#include <xc.h>
#include <plib.h>
#define SYS_FREQ (48000000L)
#pragma config UPLLEN = ON // USB PLL Enabled
#pragma config FPLLMUL = MUL_24 // PLL Multiplier
#pragma config UPLLIDIV = DIV_2 // USB PLL Input Divider
#pragma config FPLLIDIV = DIV_2 // PLL Input Divider
#pragma config FPLLODIV = DIV_1 // PLL Output Divider
#pragma config FPBDIV = DIV_1 // Peripheral Clock divisor
#pragma config FWDTEN = OFF // Watchdog Timer
#pragma config WDTPS = PS1 // Watchdog Timer Postscale
#pragma config FCKSM = CSDCMD // Clock Switching & Fail Safe Clock Monitor
#pragma config OSCIOFNC = OFF // CLKO Enable
#pragma config POSCMOD = HS // Primary Oscillator
#pragma config IESO = OFF // Internal/External Switch-over
#pragma config FSOSCEN = OFF // Secondary Oscillator Enable (KLO was off)
#pragma config FNOSC = PRIPLL // Oscillator Selection
#pragma config CP = OFF // Code Protect
#pragma config BWP = OFF // Boot Flash Write Protect
#pragma config PWP = OFF // Program Flash Write Protect
#pragma config ICESEL = ICS_PGx2 // ICE/ICD Comm Channel Select
#define ALL_BITS 0xFFFFFFFF
#define FUB_PAD0 (1<<13)
#define FUB_PAD1 (1<<10)
#define FUB_PAD2 (1<<7)
#define FUB_PAD3 (1<<14)
#define FUB_PAD4 (1<<15)
#define FUB_PAD5 (1<<0)
#define FUB_PAD6 (1<<1)
#define FUB_PAD7 (1<<0)
#define FUB_PAD8 (1<<1)
#define FUB_PAD9 (1<<2)
#define FUB_PAD10 (1<<3)
#define FUB_PAD11 (1<<0)
#define FUB_PAD12 (1<<1)
#define FUB_PAD13 (1<<2)
#define FUB_PAD14 (1<<2)
#define FUB_PAD15 (1<<3)
#define FUB_PAD16 (1<<8)
#define FUB_PAD17 (1<<4)
#define FUB_PAD18 (1<<4)
#define FUB_PAD19 (1<<9)
#define FUB_PAD20 (1<<3)
#define FUB_PAD21 (1<<4)
#define FUB_PAD22 (1<<5)
#define FUB_PAD23 (1<<5)
#define FUB_PAD24 (1<<7)
#define FUB_PAD25 (1<<8)
#define FUB_PAD26 (1<<9)
#define FUB_PAD27 (1<<6)
#define FUB_PAD28 (1<<7)
#define FUB_PAD29 (1<<8)
#define FUB_PAD30 (1<<9)
#define FUB_PAD31 (1<<10)
#define FUB_PAD32 (1<<11)
#define FUB_P0 IOPORT_B,FUB_PAD0
#define FUB_P1 IOPORT_A,FUB_PAD1
#define FUB_P2 IOPORT_A,FUB_PAD2
#define FUB_P3 IOPORT_B,FUB_PAD3
#define FUB_P4 IOPORT_B,FUB_PAD4
#define FUB_P5 IOPORT_A,FUB_PAD5
#define FUB_P6 IOPORT_A,FUB_PAD6
#define FUB_P7 IOPORT_B,FUB_PAD7
#define FUB_P8 IOPORT_B,FUB_PAD8
#define FUB_P9 IOPORT_B,FUB_PAD9
#define FUB_P10 IOPORT_B,FUB_PAD10
#define FUB_P11 IOPORT_C,FUB_PAD11
#define FUB_P12 IOPORT_C,FUB_PAD12
#define FUB_P13 IOPORT_C,FUB_PAD13
#define FUB_P14 IOPORT_A,FUB_PAD14
#define FUB_P15 IOPORT_A,FUB_PAD15
#define FUB_P16 IOPORT_A,FUB_PAD16
#define FUB_P17 IOPORT_B,FUB_PAD17
#define FUB_P18 IOPORT_A,FUB_PAD18
#define FUB_P19 IOPORT_A,FUB_PAD19
#define FUB_P20 IOPORT_C,FUB_PAD20
#define FUB_P21 IOPORT_C,FUB_PAD21
#define FUB_P22 IOPORT_C,FUB_PAD22
#define FUB_P23 IOPORT_B,FUB_PAD23
#define FUB_P24 IOPORT_B,FUB_PAD24
#define FUB_P25 IOPORT_B,FUB_PAD25
#define FUB_P26 IOPORT_B,FUB_PAD26
#define FUB_P27 IOPORT_C,FUB_PAD27
#define FUB_P28 IOPORT_C,FUB_PAD28
#define FUB_P29 IOPORT_C,FUB_PAD29
#define FUB_P30 IOPORT_C,FUB_PAD30
#define FUB_P31 IOPORT_B,FUB_PAD31
#define FUB_P32 IOPORT_B,FUB_PAD32
#define USR_LED IOPORT_A,FUB_PAD1
#define FUBARINO_IOA_MAP (FUB_PAD1|FUB_PAD2|FUB_PAD5|FUB_PAD6|FUB_PAD14|FUB_PAD15|FUB_PAD16|FUB_PAD18|FUB_PAD19)
#define FUBARINO_IOB_MAP (FUB_PAD0|FUB_PAD3|FUB_PAD4|FUB_PAD7|FUB_PAD8|FUB_PAD9|FUB_PAD10|FUB_PAD17|FUB_PAD23|FUB_PAD24|FUB_PAD25|FUB_PAD26|FUB_PAD31|FUB_PAD32)
#define FUBARINO_IOC_MAP (FUB_PAD20|FUB_PAD21|FUB_PAD22|FUB_PAD11|FUB_PAD12|FUB_PAD13|FUB_PAD27|FUB_PAD28|FUB_PAD29|FUB_PAD30)
void init();
void configIO();
void delay();
void main ()
{
init();
configIO();
while(1)
{
PORTToggleBits(USR_LED);
delay();
}
}
void delay()
{
unsigned int tt;
tt = 24000000;
while(tt--)
Nop();
}
void configIO()
{
//ALL INPUT TO AVOID ISSUES
PORTSetPinsDigitalIn(IOPORT_A, ALL_BITS);
PORTSetPinsDigitalIn(IOPORT_B, ALL_BITS);
PORTSetPinsDigitalIn(IOPORT_C, ALL_BITS);
PORTSetPinsDigitalOut(IOPORT_A, FUBARINO_IOA_MAP);
PORTSetPinsDigitalOut(IOPORT_B, FUBARINO_IOB_MAP);
PORTSetPinsDigitalOut(IOPORT_C, FUBARINO_IOC_MAP);
}
void init()
{
SYSTEMConfig(SYS_FREQ, SYS_CFG_ALL);
OSCConfig(OSC_POSC_PLL, OSC_PLL_MULT_24,OSC_PLL_POST_2,0);
mOSCSetPBDIV( OSC_PB_DIV_1 ); // Configure the PB bus to run at 1/4 the CPU frequency
}
I made this one:I use the mplabx device configuration bits menu to help generate device options
50mhz CPU clock from a 10mhz external clock example:
// PIC32MX250F128D Configuration Bit Settings
// 'C' source line config statements
#include <xc.h>
// DEVCFG3
// USERID = No Setting
#pragma config PMDL1WAY = ON // Peripheral Module Disable Configuration (Allow only one reconfiguration)
#pragma config IOL1WAY = ON // Peripheral Pin Select Configuration (Allow only one reconfiguration)
#pragma config FUSBIDIO = ON // USB USID Selection (Controlled by the USB Module)
#pragma config FVBUSONIO = ON // USB VBUS ON Selection (Controlled by USB Module)
// DEVCFG2
#pragma config FPLLIDIV = DIV_2 // PLL Input Divider (2x Divider)
#pragma config FPLLMUL = MUL_24 // PLL Multiplier (24x Multiplier)
#pragma config UPLLIDIV = DIV_2 // USB PLL Input Divider (2x Divider)
#pragma config UPLLEN = ON // USB PLL Enable (Enabled)
#pragma config FPLLODIV = DIV_1 // System PLL Output Clock Divider (PLL Divide by 1)
// DEVCFG1
#pragma config FNOSC = PRIPLL // Oscillator Selection Bits (Primary Osc w/PLL (XT+,HS+,EC+PLL))
#pragma config FSOSCEN = OFF // Secondary Oscillator Enable (Disabled)
#pragma config IESO = ON // Internal/External Switch Over (Enabled)
#pragma config POSCMOD = XT // Primary Oscillator Configuration (XT osc mode)
#pragma config OSCIOFNC = OFF // CLKO Output Signal Active on the OSCO Pin (Disabled)
#pragma config FPBDIV = DIV_1 // Peripheral Clock Divisor (Pb_Clk is Sys_Clk/1)
#pragma config FCKSM = CSDCMD // Clock Switching and Monitor Selection (Clock Switch Disable, FSCM Disabled)
#pragma config WDTPS = PS1 // Watchdog Timer Postscaler (1:1)
#pragma config WINDIS = OFF // Watchdog Timer Window Enable (Watchdog Timer is in Non-Window Mode)
#pragma config FWDTEN = OFF // Watchdog Timer Enable (WDT Disabled (SWDTEN Bit Controls))
#pragma config FWDTWINSZ = WISZ_25 // Watchdog Timer Window Size (Window Size is 25%)
// DEVCFG0
#pragma config JTAGEN = OFF // JTAG Enable (JTAG Disabled)
#pragma config ICESEL = ICS_PGx1 // ICE/ICD Comm Channel Select (Communicate on PGEC1/PGED1)
#pragma config PWP = OFF // Program Flash Write Protect (Disable)
#pragma config BWP = OFF // Boot Flash Write Protect bit (Protection Disabled)
#pragma config CP = OFF // Code Protect (Protection Disabled)
/*
* File: blink32.c
* Author: Jason
*
* Created on February 27, 2014, 5:23 PM
*/
#include <stdio.h>
#include <stdlib.h>
#include <xc.h>
#include <plib.h>
#define SYS_FREQ (48000000L)
// DEVCFG3
// USERID = No Setting
#pragma config PMDL1WAY = OFF // Peripheral Module Disable Configuration (Allow multiple reconfigurations)
#pragma config IOL1WAY = OFF // Peripheral Pin Select Configuration (Allow multiple reconfigurations)
#pragma config FUSBIDIO = OFF // USB USID Selection (Controlled by Port Function)
#pragma config FVBUSONIO = OFF // USB VBUS ON Selection (Controlled by Port Function)
// DEVCFG2
#pragma config FPLLIDIV = DIV_2 // PLL Input Divider (2x Divider)
#pragma config FPLLMUL = MUL_24 // PLL Multiplier (24x Multiplier)
#pragma config UPLLIDIV = DIV_2 // USB PLL Input Divider (2x Divider)
#pragma config UPLLEN = ON // USB PLL Enable (Enabled)
#pragma config FPLLODIV = DIV_2 // System PLL Output Clock Divider (PLL Divide by 2)
// DEVCFG1
#pragma config FNOSC = PRIPLL // Oscillator Selection Bits (Primary Osc w/PLL (XT+,HS+,EC+PLL))
#pragma config FSOSCEN = OFF // Secondary Oscillator Enable (Disabled)
#pragma config IESO = OFF // Internal/External Switch Over (Disabled)
#pragma config POSCMOD = XT // Primary Oscillator Configuration (XT osc mode)
#pragma config OSCIOFNC = OFF // CLKO Output Signal Active on the OSCO Pin (Disabled)
#pragma config FPBDIV = DIV_1 // Peripheral Clock Divisor (Pb_Clk is Sys_Clk/1)
#pragma config FCKSM = CSECME // Clock Switching and Monitor Selection (Clock Switch Enable, FSCM Enabled)
#pragma config WDTPS = PS1024 // Watchdog Timer Postscaler (1:1024)
#pragma config WINDIS = OFF // Watchdog Timer Window Enable (Watchdog Timer is in Non-Window Mode)
#pragma config FWDTEN = OFF // Watchdog Timer Enable (WDT Disabled (SWDTEN Bit Controls))
#pragma config FWDTWINSZ = WISZ_25 // Watchdog Timer Window Size (Window Size is 25%)
// DEVCFG0
#pragma config JTAGEN = OFF // JTAG Enable (JTAG Disabled)
#pragma config ICESEL = ICS_PGx1 // ICE/ICD Comm Channel Select (Communicate on PGEC1/PGED1)
#pragma config PWP = OFF // Program Flash Write Protect (Disable)
#pragma config BWP = OFF // Boot Flash Write Protect bit (Protection Disabled)
#pragma config CP = OFF // Code Protect (Protection Disabled)
#define ALL_BITS 0xFFFFFFFF
#define FUB_PAD0 (1<<13)
#define FUB_PAD1 (1<<10)
#define FUB_PAD2 (1<<7)
#define FUB_PAD3 (1<<14)
#define FUB_PAD4 (1<<15)
#define FUB_PAD5 (1<<0)
#define FUB_PAD6 (1<<1)
#define FUB_PAD7 (1<<0)
#define FUB_PAD8 (1<<1)
#define FUB_PAD9 (1<<2)
#define FUB_PAD10 (1<<3)
#define FUB_PAD11 (1<<0)
#define FUB_PAD12 (1<<1)
#define FUB_PAD13 (1<<2)
#define FUB_PAD14 (1<<2)
#define FUB_PAD15 (1<<3)
#define FUB_PAD16 (1<<8)
#define FUB_PAD17 (1<<4)
#define FUB_PAD18 (1<<4)
#define FUB_PAD19 (1<<9)
#define FUB_PAD20 (1<<3)
#define FUB_PAD21 (1<<4)
#define FUB_PAD22 (1<<5)
#define FUB_PAD23 (1<<5)
#define FUB_PAD24 (1<<7)
#define FUB_PAD25 (1<<8)
#define FUB_PAD26 (1<<9)
#define FUB_PAD27 (1<<6)
#define FUB_PAD28 (1<<7)
#define FUB_PAD29 (1<<8)
#define FUB_PAD30 (1<<9)
#define FUB_PAD31 (1<<10)
#define FUB_PAD32 (1<<11)
#define FUB_P0 IOPORT_B,FUB_PAD0
#define FUB_P1 IOPORT_A,FUB_PAD1
#define FUB_P2 IOPORT_A,FUB_PAD2
#define FUB_P3 IOPORT_B,FUB_PAD3
#define FUB_P4 IOPORT_B,FUB_PAD4
#define FUB_P5 IOPORT_A,FUB_PAD5
#define FUB_P6 IOPORT_A,FUB_PAD6
#define FUB_P7 IOPORT_B,FUB_PAD7
#define FUB_P8 IOPORT_B,FUB_PAD8
#define FUB_P9 IOPORT_B,FUB_PAD9
#define FUB_P10 IOPORT_B,FUB_PAD10
#define FUB_P11 IOPORT_C,FUB_PAD11
#define FUB_P12 IOPORT_C,FUB_PAD12
#define FUB_P13 IOPORT_C,FUB_PAD13
#define FUB_P14 IOPORT_A,FUB_PAD14
#define FUB_P15 IOPORT_A,FUB_PAD15
#define FUB_P16 IOPORT_A,FUB_PAD16
#define FUB_P17 IOPORT_B,FUB_PAD17
#define FUB_P18 IOPORT_A,FUB_PAD18
#define FUB_P19 IOPORT_A,FUB_PAD19
#define FUB_P20 IOPORT_C,FUB_PAD20
#define FUB_P21 IOPORT_C,FUB_PAD21
#define FUB_P22 IOPORT_C,FUB_PAD22
#define FUB_P23 IOPORT_B,FUB_PAD23
#define FUB_P24 IOPORT_B,FUB_PAD24
#define FUB_P25 IOPORT_B,FUB_PAD25
#define FUB_P26 IOPORT_B,FUB_PAD26
#define FUB_P27 IOPORT_C,FUB_PAD27
#define FUB_P28 IOPORT_C,FUB_PAD28
#define FUB_P29 IOPORT_C,FUB_PAD29
#define FUB_P30 IOPORT_C,FUB_PAD30
#define FUB_P31 IOPORT_B,FUB_PAD31
#define FUB_P32 IOPORT_B,FUB_PAD32
#define USR_LED IOPORT_A,FUB_PAD1
#define FUBARINO_IOA_MAP (FUB_PAD1|FUB_PAD2|FUB_PAD5|FUB_PAD6|FUB_PAD14|FUB_PAD15|FUB_PAD16|FUB_PAD18|FUB_PAD19)
#define FUBARINO_IOB_MAP (FUB_PAD0|FUB_PAD3|FUB_PAD4|FUB_PAD7|FUB_PAD8|FUB_PAD9|FUB_PAD10|FUB_PAD17|FUB_PAD23|FUB_PAD24|FUB_PAD25|FUB_PAD26|FUB_PAD31|FUB_PAD32)
#define FUBARINO_IOC_MAP (FUB_PAD20|FUB_PAD21|FUB_PAD22|FUB_PAD11|FUB_PAD12|FUB_PAD13|FUB_PAD27|FUB_PAD28|FUB_PAD29|FUB_PAD30)
void init();
void configIO();
void delay();
void main ()
{
init();
configIO();
while(1)
{
PORTToggleBits(USR_LED);
delay();
}
}
void delay()
{
unsigned int tt;
tt = 1000000;
while(tt--)
Nop();
}
void configIO()
{
//ALL INPUT TO AVOID ISSUES
PORTSetPinsDigitalIn(IOPORT_A, ALL_BITS);
PORTSetPinsDigitalIn(IOPORT_B, ALL_BITS);
PORTSetPinsDigitalIn(IOPORT_C, ALL_BITS);
PORTSetPinsDigitalOut(IOPORT_A, FUBARINO_IOA_MAP);
PORTSetPinsDigitalOut(IOPORT_B, FUBARINO_IOB_MAP);
PORTSetPinsDigitalOut(IOPORT_C, FUBARINO_IOC_MAP);
}
void init()
{
SYSTEMConfig(SYS_FREQ, SYS_CFG_ALL);
OSCConfig(OSC_POSC_PLL, OSC_PLL_MULT_24,OSC_PLL_POST_2,0);
mOSCSetPBDIV( OSC_PB_DIV_1 ); // Configure the PB bus to run at 1/4 the CPU frequency
}
/*
* File: blink32.c
* Author: Jason
*
* Created on February 27, 2014, 5:23 PM
*/
#include <stdio.h>
#include <stdlib.h>
#include <xc.h>
#include <plib.h>
#include "fubmini.h"
#define SYS_FREQ (48000000L)
// DEVCFG3
// USERID = No Setting
#pragma config PMDL1WAY = OFF // Peripheral Module Disable Configuration (Allow multiple reconfigurations)
#pragma config IOL1WAY = OFF // Peripheral Pin Select Configuration (Allow multiple reconfigurations)
#pragma config FUSBIDIO = OFF // USB USID Selection (Controlled by Port Function)
#pragma config FVBUSONIO = OFF // USB VBUS ON Selection (Controlled by Port Function)
// DEVCFG2
#pragma config FPLLIDIV = DIV_2 // PLL Input Divider (2x Divider)
#pragma config FPLLMUL = MUL_24 // PLL Multiplier (24x Multiplier)
#pragma config UPLLIDIV = DIV_2 // USB PLL Input Divider (2x Divider)
#pragma config UPLLEN = ON // USB PLL Enable (Enabled)
#pragma config FPLLODIV = DIV_2 // System PLL Output Clock Divider (PLL Divide by 2)
// DEVCFG1
#pragma config FNOSC = PRIPLL // Oscillator Selection Bits (Primary Osc w/PLL (XT+,HS+,EC+PLL))
#pragma config FSOSCEN = OFF // Secondary Oscillator Enable (Disabled)
#pragma config IESO = OFF // Internal/External Switch Over (Disabled)
#pragma config POSCMOD = XT // Primary Oscillator Configuration (XT osc mode)
#pragma config OSCIOFNC = OFF // CLKO Output Signal Active on the OSCO Pin (Disabled)
#pragma config FPBDIV = DIV_1 // Peripheral Clock Divisor (Pb_Clk is Sys_Clk/1)
#pragma config FCKSM = CSECME // Clock Switching and Monitor Selection (Clock Switch Enable, FSCM Enabled)
#pragma config WDTPS = PS1024 // Watchdog Timer Postscaler (1:1024)
#pragma config WINDIS = OFF // Watchdog Timer Window Enable (Watchdog Timer is in Non-Window Mode)
#pragma config FWDTEN = OFF // Watchdog Timer Enable (WDT Disabled (SWDTEN Bit Controls))
#pragma config FWDTWINSZ = WISZ_25 // Watchdog Timer Window Size (Window Size is 25%)
// DEVCFG0
#pragma config JTAGEN = OFF // JTAG Enable (JTAG Disabled)
#pragma config ICESEL = ICS_PGx1 // ICE/ICD Comm Channel Select (Communicate on PGEC1/PGED1)
#pragma config PWP = OFF // Program Flash Write Protect (Disable)
#pragma config BWP = OFF // Boot Flash Write Protect bit (Protection Disabled)
#pragma config CP = OFF // Code Protect (Protection Disabled)
#define ALL_BITS 0xFFFFFFFF
//SPI
#define MIN_SPI_TXFER_SIZE 8 // min number of words per transfer
#define MAX_SPI_TXFER_SIZE 512 // max number of words per transfer
#define CS1 FUB_P10
void SpiInitDevice(int chn, int isMaster, int frmEn, int frmMaster, int srcClkDiv);
void SpiConfigPins();
void init();
void configIO();
void delay();
void main ()
{
init();
configIO();
SpiInitDevice(2,1,0,0,10); //SPI2 , MASTER (NO FRAMING), CLK/4
while(1)
{
PORTClearBits(CS1);
SpiChnPutC(2,'J');
while(SpiChnIsBusy(2) > 0);
PORTSetBits(CS1);
delay();
}
}
void delay()
{
unsigned int tt;
tt = 100000;
while(tt--)
Nop();
}
void configIO()
{
//ALL INPUT TO AVOID ISSUES
PORTSetPinsDigitalIn(IOPORT_A, ALL_BITS);
PORTSetPinsDigitalIn(IOPORT_B, ALL_BITS);
PORTSetPinsDigitalIn(IOPORT_C, ALL_BITS);
PORTSetPinsDigitalOut(IOPORT_A, FUBARINO_IOA_MAP);
PORTSetPinsDigitalOut(IOPORT_B, FUBARINO_IOB_MAP);
PORTSetPinsDigitalOut(IOPORT_C, FUBARINO_IOC_MAP);
}
void init()
{
SYSTEMConfig(SYS_FREQ, SYS_CFG_ALL);
OSCConfig(OSC_POSC_PLL, OSC_PLL_MULT_24,OSC_PLL_POST_2,0);
mOSCSetPBDIV( OSC_PB_DIV_1 ); // Configure the PB bus to run at 1/4 the CPU frequency
}
/*********************************************************************
* Function: void SpiInitDevice(int chn, int isMaster, int frmEn, int frmMaster)
*
* PreCondition: None
*
* Input: chn - the SPI channel to use, 1 or 2
*
* isMaster - 1: the device is to act as a bus master
* 0: the device is an SPI slave
*
* frmEn - 1: frame mode is enabled
* - 0: frame mode is disabled
*
* frmMaster - 0: if frame mode is enabled, the device is a frame slave (FRMSYNC is input)
* 1: if frame mode is enabled, the device is a frame master (FRMSYNC is output)
*
* Output: None
*
* Side Effects: None
*
* Overview: Inits the SPI channel 1 to use 8 bit byte
* Performs the device initialization in both master/slave modes.
*
* Note: None
********************************************************************/
void SpiInitDevice(int chn, int isMaster, int frmEn, int frmMaster, int srcClkDiv)
{
unsigned int config=SPI_CON_MODE8|SPI_CON_SMP|SPI_CON_ON; // SPI configuration word
SpiConfigPins();
if(isMaster)
{
config|=SPI_CON_MSTEN;
}
if(frmEn)
{
config|=SPI_CON_FRMEN;
if(!frmMaster)
{
config|=SPI_CON_FRMSYNC;
}
}
SpiChnOpen(chn, config, srcClkDiv); // divide fpb by 4, configure the I/O ports. Not using SS in this example
}
void SpiConfigPins()
{
SYSKEY = 0x0; // Make sure SYSKEY is locked
SYSKEY = 0xAA996655; // SYSKEY unlock sequence
SYSKEY = 0x556699AA;
PPSInput(3,SDI2,RPA4); //MISO2 - P18
PPSOutput(2,RPA1,SDO2); //MOSI2 - P06
SYSKEY = 0x0; // Relock SYSKEY
PORTSetPinsDigitalIn(FUB_P18);
PORTSetPinsDigitalOut(FUB_P6);
}
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