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Polling RB1 and RB2 in 16F628

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Alphadl

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Hi,
I am trying to poll RB1 and RB2 of 16F628, once an external interrupt occurs.
I am able to handle the EXT interrupt.
But by default the ports RB1 and RB2 are reading as high,and when i connect it to GND(VSS) then its becomming '0'.
Actually i want to connect two switches to these ports and set some values using these switches.
I want to have a port state change when key is pressed (and not when released)
Now I am confused on how to connect these switches.
Also i would like to know is there anything wrong in connecting port pins directly to VDD or VSS.
Finally i would like to know is it okay to check the port as if (RB1==1) using C, or should i read the entire port and do a shift operation?
Regards
Alphadl
 
I want to have a port state change when key is pressed (and not when released)
It's all in how you code it.
Code:
If button ==0   //then do this part or  
If button ==1         // do this also put a delay
 
Also i would like to know is there anything wrong in connecting port pins directly to VDD or VSS.
If you tied a pin to VDD and output a logical 0 you would have a high current situation. The same is true for VSS and a logical 1.
To be on the safe side tie them hi or low using a 10K resistor, it will reduce current to a safe level.

Read the processor datasheet regarding PORTB and interrupt on change. I recall somewhere that they recommend that you not read (poll) the pin(port?) used for interrupt on change. Not sure if it is true or true for this processor as I work mostly with 18F's.
 
here a little reading and you don't want to short the pin use a pull up or pull down resistor like 3v0 said
14.6.1 RB0/INT INTERRUPT
External interrupt on RB0/INT pin is edge triggered:
either rising if INTEDG bit (OPTION<6>) is set, or
falling, if INTEDG bit is clear. When a valid edge
appears on the RB0/INT pin, the INTF bit
(INTCON<1>) is set. This interrupt can be disabled by
clearing the INTE control bit (INTCON<4>). The INTF
bit must be cleared in software in the interrupt service
routine before re-enabling this interrupt. The RB0/INT
interrupt can wake-up the processor from SLEEP, if the
INTE bit was set prior to going into SLEEP. The status
of the GIE bit decides whether or not the processor
branches to the interrupt vector following wake-up. See
Section 14.9 for details on SLEEP, and Figure 14-17
for timing of wake-up from SLEEP through RB0/INT
interrupt
Note: If a change on the I/O pin should occur
when the read operation is being executed
(start of the Q2 cycle), then the RBIF interrupt
flag may not get set..
 
Last edited:
Only B4 to B7 have the ability to generate an interrupt on change. The normal way to wire switches is to turn on the Week Pull Ups (WPUs) and have the switch going to ground. To find pins that have gone low you do,
Code:
unsigned char previous;	//must be global
unsigned char temp,newlows;

	temp=portb;
	newlows=(temp^previous)&previous;
	previous=temp;
	if((newlows&0x08)!=0){
	    //RB4 pressed
	}
	if((newlows&0x04)!=0){
	    //RB5 pressed
	}

Mike.
 
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