Power dissipation of PIC

[akg]

The power consumption of a micro varies with the clock frequency(irrespective of clock duty cycle) ..right?

is it because the micro's 'activity' is during the clock edges .??
will the power dissipation will be same when using to clocks , one with 10% duty cycle and another with 90% duty cycle , with same freq ?

 

[Nigel Goodwin]

The power consumption of a micro varies with the clock frequency(irrespective of clock duty cycle) ..right?

is it because the micro's 'activity' is during the clock edges .??
will the power dissipation will be same when using to clocks , one with 10% duty cycle and another with 90% duty cycle , with same freq ?

It's a pointless question, most micro's divide the clock internally (the PIC by four), which makes it 50/50 anyway.

 

[akg]

so how .. the power dissipation reduces when clk freq is reduced ?

take the case of 50% duty cycle and two clk of 1Khz and 10Khz

over a period of time say 1 sec , both is high for 0.5 sec , so the micro is 'on' (say) for 0.5 sec irrespective of the clk freq.. so why the variation in power dissipation ..

am i clear ? is there anything i'm missing ?
thanks

 

[Jay.slovak]

Power dissipation is a linear function of frequency and a square function od supply voltage. This means, it better to try to lower the voltage, than just to lower operating frequency. This applies to all CMOS devices, including PICs.

 

[akg]

Power dissipation is a linear function of frequency and a square function od supply voltage. This means, it better to try to lower the voltage, than just to lower operating frequency. This applies to all CMOS devices, including PICs.

thanks Nigel & Jay....

but my brain is still dissipating more power .. :x

i can get the concept .. as vcc goes up power dissipation also goes up ..
but i cannot get the physical idea with the freq!!... as i'm stuck at this

"over a period of time say 1 sec , both is high for 0.5 sec , so the micro is 'on' (say) for 0.5 sec irrespective of the clk freq.. so why the variation in power dissipation .."

 

[Jay.slovak]

The micro is not 'ON' and 'OFF', these pulses just shift the data inside the PIC. All CMOS devices have two transistors (P and N MOS) inside, that make internal GATEs. Durring the clock transition, both transistors are open, and therefore are creating short current spikes (shorting the VCC and GND). With more transitions pre second, more "shorts" occure and therefore it produces more heat.

 

[akg]

The micro is not 'ON' and 'OFF', these pulses just shift the data inside the PIC. All CMOS devices have two transistors (P and N MOS) inside, that make internal GATEs. Durring the clock transition, both transistors are open, and therefore are creating short current spikes (shorting the VCC and GND). With more transitions pre second, more "shorts" occure and therefore it produces more heat.

If THAT is the reason .. that's what i'm looking for .. and Thank U jay..for pouring water ....

 

[Jay.slovak]

You are welcome.

I just hope that my explanation was understandable, my English is a bit rusty

 

[akg]

You are welcome.

I just hope that my explanation was understandable, my English is a bit rusty

no problem .. i have sandpaper