In the attached circuit, U1 produces a negative going signal which is ultimately proportional to the pulse width of the input signal. The green trace in the first attachment is the output of U1. But trial and error, I've concluded that it's very important to prevent U1 from becomming overloaded during the input signal's "low" period, the period during which U1's output retraces and drives quickly towards the positive rail, in preperation for the next measurement. In the second attachment, the rounded rectangle shows the circuitry that prevents overloading. Once the output of U1 "retraces" and becomes high, the output of U4, which is configured as a summing amplifier, is close to gound level, so that U1 does not overload. The idea is to drive U1 hard until it rises very close to the positive rail, then pull the drive back. I don't know if I made that clear or not.
My question is about the circuit that prevents overload. Has anyone else tried to do this? And if so, is there a better or easier way? This looks like it will work, but is just a little complex.
My question is about the circuit that prevents overload. Has anyone else tried to do this? And if so, is there a better or easier way? This looks like it will work, but is just a little complex.
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