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Programming a GAL with code for a lower spec device

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Llamarama

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Hello everyone, I have a circuit and .jed file that requires a GAL16V8, however I don't have any of those handy, but I do have several GAL20V10's in stock. What sort of editing will I have to do to the .jed file (if any) to get this to work?

Sorry if this is a stupid question, this is my first time working with these sort of GALs! :)

Thanks in advance, Mike
 
With out the source code; you will need to understand each and every bit in the GAL16V8 and understand each and every bit in the 20V10. Wow. I probably could have done it years ago when I worked with these every day.
 
Hello everyone, I have a circuit and .jed file that requires a GAL16V8, however I don't have any of those handy, but I do have several GAL20V10's in stock. What sort of editing will I have to do to the .jed file (if any) to get this to work?

Sorry if this is a stupid question, this is my first time working with these sort of GALs!

Massive editing. Even if you were experienced with these parts and their firmware, it would be easier to write a compiler from scratch. The good news is that most vendors have free compiling software.

ak
 
I have used PALASM and like it but I believe it has not been updated in more than a decade.
Glad to see CUPL is alive.
 
When I started with programmable logic every one made them. There were many types. Now they are hard to find. Not many sources.
GAL16V8 & GAL20V10 do the job of many types that are no longer available.
 
I think ISPlever classic supports GALs but my memory is hazy. At least you could design your logic with schematics, VHDL or verilog.

https://www.latticesemi.com/ispleverclassic

Not sure if the output is Vendor specific for GALs, not used one for 10+ years.
 
Cool, looks like Lattice bought out AMD CPLD division. The Mach family was originally a AMD device. I like that part because it was like a large 22V10, in other words it contained the 22V10 x 5 or something like that. It was useful for a little more than a generic address decoder that the 16V8 were popular for. Be cool if ABEL was still available, ABEL was the tool I used after PALASM. I learned digital design with PALASM though.
 
I just download Lattice Diamond, been wanting to check this software out for awhile, so I said, what the heck:)
 
Thanks for the replies guys, I think I'll try to source a 16V8 for the time being, but try and reverse engineer the logic as a side-side project! :)

It's a shame these devices are pretty much dead in the wild, they're quite nice to work with all things considered, but then again, I'm a sucker for logic machines... I'll have to check out Lattice Diamond, I've played around with PALASM when I was at uni a few years back and I hated how picky it was.
 
Cool, looks like Lattice bought out AMD CPLD division. The Mach family was originally a AMD device. I like that part because it was like a large 22V10, in other words it contained the 22V10 x 5 or something like that. It was useful for a little more than a generic address decoder that the 16V8 were popular for. Be cool if ABEL was still available, ABEL was the tool I used after PALASM. I learned digital design with PALASM though.

Learning VHDL or Verilog would be the thing to do these days. The M4A5 is a nice little device I use to use all the time and it is a 5V part.

Just to clarify - you can only design for CPLDs and SPLDs with ISPLEVERclassic. Diamond is geared up for FPGA work.
 
I've done over a dozen projects with Lattice parts. My fav was a retrofit radar timing controller for the FAA, converting 20 8"x8" pc boards full of 1980's random logic into 1.5 CPLD's (the other 0.5 CPLD had a complete VME Bus interface). That was fun.

The M4 parts are outstanding, but are going (or already) obsolete. Lattice and everyone else are pushing everyone to small FPGAs. At one level I don't care since I do all of my designs in the schematic editor and let the compiler figure out the parts, but it is an unnecessary complication. The Diamond/FPGA sphere is much more complex than Lever/CPLD.

ak
 
Yeah I do vhdl using verilog. I have not tested diamond yet as something unexpectedly came up with my health so I'm outta commission for a couple days
 
I did get both diamond and lever. Looks like lever uses wincupl.
 
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