(Suraj143) Dutycycle
Suraj143:
Q1)If I use PR2 = 255 & Pre Scalar = 16 & XT = 4Mhz the result will be 4096 is this in seconds or in uS?
The number is 0.004096 seconds, this can be read anyway you like.
Though usually the answer will reflect the range it is in. For example, if
the decimal must move 6 times to the right to reach the first non-zero
digit then it will read as uSec. In this case will move 3 times to the right:
0.004096 seconds = 4.096 mSec
Q2)The thing is when I just load a value to CCPR1L & ignoring the 5,4 bits
of CCP1CON register, For example if I load d'1' to CCPR1L will it count
from 1 or will it wait until the two lower bits overflows from the CCP1CON
5,4 bits.In this case it will be d'4'. Any idea?
The duty cycle registers CCPR1L (8 MSBs) and the CCP1CON <5:4>
(2 LSBs) do not count automatically and there is no overflow-though you
can program them to count up/down or to any value you like. If you desire
to vary only the CCPR1L register and for example set the CCP1CON <5:4>
bits both low then the dutycycle will increment/decrement in values of 4,
for example, if we start with 1 in the CCPR1L register and CCP1CON <5:4> bits both low (default), then the dutycycle 10 bit register value is 4:
dutycycle;(CCPR1L:CCP1CON <5:4>)=(0000000100)
now if we increment the CCPR1L register, we will have;
dutycycle;(CCPR1L:CCP1CON <5:4>)=(0000001000)
the duty cycle value is now 8, though the CCPR1L register
value incremented from 1 to 2. In other words the 2 LSBs
of the dutycycle allow for a higher resolution in the dutycycle.
If you use only 8 bits of the dutycycle register then you
are actually using the 2 LSBs in CCP1CON <5:4> along with the
first 6 bits of the CCPR1L register. If the full 8 bits of the
CCPR1L register are used - then you are using the full 10 bits
of the dutycycle, regardless of what the CCP1CON <5:4> bits
are set at, (just a lower resolution) as shown in the formula:
PWM (dutycycle)=(CCPR1L:CCP1CON<5:4>)Tosc(TMR2 PSV)