just for fun i made a R2R DAC , it is working fine , but i want to generate beautiful sine wave,
i can not generate it with normal pulse funcion of LTC, what function should i give at input.
NOTE - everything at input is reversed at output because of inverting op-amp operation
To get a reasonably low distortion sinewave you need many bits (likely 8 or more) of D/A conversion and a look-up table to generate the proper bit pattern that most closely approximates a sinewave.
To get a reasonably low distortion sinewave you need many bits (likely 8 or more) of D/A conversion and a look-up table to generate the proper bit pattern that most closely approximates a sinewave.
hi,
If a good quality LPF is used, a very good sine wave can be generated from a simple 6 stage Shift Register.
A 8 or more bits are not required for good sine wave generation.
I should have added to my post that you need a look-up table and many bits if you want to generate a low-distortion sine-wave over a wide frequency range without a (tracking) filter.
A relatively simple tracking filter can be built for audio frequencies using a LMF100 switched cap filter IC.
Look at this image of the stepped waveform at the input of U1 OPA, its no where like a sinewave.??
Look a the resistor values in the LPF image I posted earlier.
BTW: You still have a 9Volt input on a 5V powered 4013.!!
You seem to be using an R2R resistor network for your analog level generation. If you intend to use a constant width pulse to clock your counters then you cant use an R2R network. An R2R network will give you a ramp, not a sine wave. If you want a sine wave you have to use a different network where the resistors are chosen to give different output voltages for each logic state.
You seem to be using an R2R resistor network for your analog level generation. If you intend to use a constant width pulse to clock your counters then you cant use an R2R network. An R2R network will give you a ramp, not a sine wave. If you want a sine wave you have to use a different network where the resistors are chosen to give different output voltages for each logic state.
Consider that you are trying to create a Sine wave using 6 steps,,,, each 6 steps Up creates a sine wave section from say +Vpeak to -Vpeak and and the next 6 step down say the -Vpeak upto +Vpeak etc.....................
So the weighting of the resistors is chosen to give a +peak to -peak approximation of a sine wave at the input of the 1st OPA
Look at the LPF link I posted for guidance.. clue,, think Sine wave tables.