RC delay for opamp input: how to calculate

The LM324 is an opamp, with a totem-pole output, which will override the timing resistor(s) connected at its output.
You need to replace it with a LM339 which does have an open collector output. But then it cannot source current.
Your best bet is to split the circuit with a dual comparator and a dual opamp LM393 LM358 respectively.

Thank you for that well explained reply! Back to the drawing board .

Or what about having R5 in series with output 1 with the C1 as is behind it to GND?

Edit: like this here: https://forum.allaboutcircuits.com/threads/op-amp-comparator-time-delay.133865/

I suggest you simulate the circuit in pspice and calculate the delay.

It could be another option but…. What is your supply voltage?
The high output voltage is about Vcc-2, and thus with a 5V supply you may not, or barely, reach the switching threshold.

There's also the issue that it's not modulated, so will be prone to interference from ambient light.

Lower left description error. The second "Detection-off" delay is R7 C2, not R6.

It looks like you want a delay of approx. 3.3 seconds. No way with an LM324. In a 12 V system, the delay will be around 1/5 milliseconds (assuming a 50 mA output saturation current).

1. What is the value of Vcc?

Without getting into the LM324 / LM339 output voltage range details-

2. The value of the X1 sensor sets the trip point Vcc-percentage for all four comparators - 0.5RC, RC, 2RC, whatever. What is its expected value during normal operation with normal ambient lighting?

For example, the R5-C1 delay period will equal exactly 1 x R x C only if the reference voltage at IC1B pin 5 equals exactly 0.632 x Vcc, and that reference voltage depends on X1.

Opinion - I think you will get more stable performance if you change the IC to an LM339, and add pull up resistors to the Q1 and Q2 gates, something in the 10K to 100K range. Note the significantly different pinouts.

ak

Vcc initially envisaged between 5V and 15V.

Point taken on the 5V Vcc, so better be 15V..

To Nigel: the LDR connected to X1 is supposed to be the reference resistance with ambient light, right?

AnalogKid: right, correct now. The value of X1 sesnor would be that of an LDR type 5528, ie about 2kOhms in ambient light.

To schmitt trigger: for LM324 to be used correctly 5V is too low, so I restrict usage to Vcc >12V, in my environment that would become 15V dc. I guess much better?

AnalogKid said:

Lower left description error. The second "Detection-off" delay is R7 C2, not R6.

It looks like you want a delay of approx. 3.3 seconds. No way with an LM324. In a 12 V system, the delay will be around 1/5 milliseconds (assuming a 50 mA output saturation current).

1. What is the value of Vcc?

Without getting into the LM324 / LM339 output voltage range details-

2. The value of the X1 sensor sets the trip point Vcc-percentage for all four comparators - 0.5RC, RC, 2RC, whatever. What is its expected value during normal operation with normal ambient lighting?

For example, the R5-C1 delay period will equal exactly 1 x R x C only if the reference voltage at IC1B pin 5 equals exactly 0.632 x Vcc, and that reference voltage depends on X1.

Opinion - I think you will get more stable performance if you change the IC to an LM339, and add pull up resistors to the Q1 and Q2 gates, something in the 10K to 100K range. Note the significantly different pinouts.

ak

Click to expand...

I read your comment just now again, I guess some must have been edited, sorry for the delayed answer ak.

The LDR in ambient light would be between 1.5k and 4k.
Point taken on the LM339; but what about the detection LED's? They work with an opamp sourcing current, but with an LM339 this will not be the case.
Pinouts for LM339: point noted.

One option is to change from one quad part to two dual parts: LM358 and LM393. Less convenient board layout . . .

If you stick with the LM324, the new schematic is fine. Note that the opamp output high voltage is not equal to Vcc, so the delay period will be longer than with an LM339 stage. The timing cap is charging op to (Vcc-1.5V) - ish rather than just Vcc. The lower voltage source means lower charging current. The error from calculated times probably is around 10%.

ak

That takes too much space on my pcb available surface.

What about this setup:

The LM339 will not work with the updated schematic for U1A and C.

If you stick with the LM324, the new schematic is fine and you don't need the pull-up resistors. Note that the opamp output high voltage is not equal to Vcc, so the delay period will be a bit longer than with an LM339 stage. The timing cap is charging up to (Vcc-1.5V) - ish rather than just Vcc. The lower voltage source means lower charging current. The error from calculated times probably is around 10%.

I've come around from post #8. The 324 looks like the best overall choice.

ak

earckens said:

The LDR in ambient light would be between 1.5k and 4k.

Click to expand...

OK, back to the original question.

With an average value of approx. 2.75K, the reference voltage at R1-R4 is about 31.8% of Vcc. That is almost exactly equal to 0.5 x R x C, so I think the design intent is pretty clear.

That was easy. Time to spew . . .

You can adjust R1 and R4 for any reasonable multiplier of RC. The higher the multiplier, the smaller the values of the downstream timing capacitors, but there is no free lunch. The higher trip point voltages are higher up on the capacitor's exponential charging curve, so the cap voltage is increasing more slowly across the trip point voltage. This means more noise in the comparison, which manifests as a slight variation in timing period. Also, the long term effects of temperature and aging will be more apparent.

Separate from that is the increased possibility of a comparator output stage noise burst as the cap voltage wanders across the trip point. This is because a comparator is just a wide-open high-gain opamp at heart. Normally this is prevented with hysteresis, but I think that adds unnecessary complications to the circuit.

That all sounds bad, but the issues are actually pretty small. Still, If you want to adjust the reference voltage, I would not go above 1.5 x R x C. Turns out, there is a reason why so many timing circuits revolve around 1 x R x C, and it's not just because you can do the math in your head.

ak

Thanks!
And for the sake of completeness here the updated schematic, with LM324.
The LM234 outputs reaching 13V only is just fine: the max Vgs for the AO3400A is officially 12V, so with a bit of lenience they should hold, no?

With a Vcc above 10 V you don't need a FET with exceptional low voltage performance. Datasheet maximums never should be exceeded; they are a brick wall. There are a ton of "normal" FETs out there with a 20 V Vgs rating.

ak

Ok.

But the AO3400A has an IDc of 4.7A. I have alternatives (with Vgs >18V) like 2N7002 (0.20A), BSS138 (0.22A), BSS123 (0.17A), 2N7000 (0.35A).
So I have to restrict the drain current flowing from the external source.

True. The FET should be rated for 2x the anticipated *peak* load current.

It looks like your FETs are rated for 5.7 A. What are the FETs driving? Device / circuit / voltage / input current / etc.

ak

The source current for the FET's have high impedance gates such as MCU digital inputs so basically virtually no current. This circuit serves to signal to an MCU input the presence of a modeltrain.

But I like sometimes to overdo my design to accomadate for a 1 in 1000 possibility to drive something bigger. In this case I will then provide for some amplification circuit.