shape logic of analog differeratiator and integrator

update:
V(A) is a integrator.the input is a ramp .integrator result always rises as the input non zero. why the integrator result of V(a) gets platoe?

Google "time domain response RC differentiator", lots of examples, derivations.

yefj said:

update:
V(A) is a integrator.the input is a ramp .integrator result always rises as the input non zero. why the integrator result of V(a) gets platoe?

Click to expand...

Integrates into the supply rail limitations. Eg. Vout cannot exceed OpAmp supply rail V. In'
this case Voltage rail limit.

yefj said:

V(A) is a integrator.the input is a ramp .integrator result always rises as the input non zero. why the integrator result of V(a) gets platoe?

Click to expand...

The "integrator" is not an integrator - there is a resistor across the capacitor.

The two resistors form s voltage divider of roughly 6:1 so the capacitor can never charge beyond roughly 1/7th the supply voltage.

Note that a passive R-C integrator will not give linear results as the rate of change varies with the existing capacitor voltage, for a fixed input voltage. You need to use an opamp based integrator for to work well.

The difference between a true P or I and a passive RC network is the bandwidth beyond where the phase shift = +/-45 deg for a 1st order filter.

When you see a pulse of fixed slope and duration, you are using a partial BW with limited upper and lower end.

Thus we call RC a "partial integrator or partial derivative" and the linear region of phase shift for a 1st order filter extends +/1 decade around the breakpoint, fo.

Thus the Q = fo/BW of your modulation may determine if a partial or passive partial D + I filter will be adequate.

We generally try to match the spectrum of the filter to the output signal depending on details of group delay flatness.

Pulse modulation < ~10% d.f. extends the BW (-3dB) beyond 1 decade of f.

Partial PI filters may compromise each other when the spectrum exceeds 1 decade as below.