;
; void interrupt() // 78.125-usec "spcl event" irq
; { pir1.CCP1IF = 0; // clear CCP1 interrupt flag
; if(ctr.7) // if 10-msec half cycle
; pinmask ^= 3; // toggle output pin mask
; ctr.7 = 0; // ctr %= 127 (unconditionally)
; shadow = PORTB | pinmask; // set shadow pin 'on'
; if(ctr >= dcy) // if pwm ctr >= duty cycle
; shadow ^= pinmask; // set shadow pin 'off'
; PORTB = shadow; // update port pins
; ctr++; // bump pwm counter, 1..128
; }
;
; interrupt interval = 78.125-usecs (625 cycles @ 32-MHz clock)
;
; 7-bit (128 step) soft PWM
;
;
bcf PIR1,CCP1IF ; clr CCP1 "special event" irq |B0
movlw b'00000011' ; |B0
btfsc ctr,7 ; half cycle? no, skip, else |B0
xorwf pinmask,F ; toggle output pin mask |B0
bcf ctr,7 ; ctr %= 127 (unconditionally) |B0
movf dcy,W ; |B0
subwf ctr,W ; C = 1 = (ctr >= dcy) |B0
movf PORTB,W ; |B0
iorwf pinmask,W ; turn output pin bit 'on' |B0
skpnc ; ctr >= dcy? no, skip, else |B0
xorwf pinmask,W ; turn output pin bit 'off' |B0
movwf PORTB ; update port pins |B0
incf ctr,F ; bump pwm counter, 1..128 |B0
;