DOUBT SOLVED: see my last post below.
PIC 18F family - Assembler.
I implemented the addressing / data buses to write / read an EEPROM using a string of 74HC595 shift registers. It worked OK.
When implemented a more "adult" version with just IO pins from a 18F4520, started to get massive (but consistent) errors.
Since I peek at the data through a 74HC595 shift register driven by the SPI module (Master mode), I need to discard this doubt:
Is the SDI pin really available to me? If so, just as an output, right?
After burning my last 18F4520 (yes, I still do things like that) I am going back to the 18F452 (have plenty around).
Please read the excerpt from its datasheet (same wording as for the the late 18F4520).
Just in case, while I know that the /SS TRIS position is WRONG, that pin is not relevant here because the SPI is Master.
Any comment appreciated.
PIC 18F family - Assembler.
I implemented the addressing / data buses to write / read an EEPROM using a string of 74HC595 shift registers. It worked OK.
When implemented a more "adult" version with just IO pins from a 18F4520, started to get massive (but consistent) errors.
Since I peek at the data through a 74HC595 shift register driven by the SPI module (Master mode), I need to discard this doubt:
Is the SDI pin really available to me? If so, just as an output, right?
After burning my last 18F4520 (yes, I still do things like that) I am going back to the 18F452 (have plenty around).
Please read the excerpt from its datasheet (same wording as for the the late 18F4520).
Just in case, while I know that the /SS TRIS position is WRONG, that pin is not relevant here because the SPI is Master.
Any comment appreciated.
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