Stepper Motor Restarter

I have a Unipolar Driver / Motor (only one phase active with each pulse), that on occasion stops, and I found that if I disconnect the 74LS194's direction connections (from driver transistors), it starts back up. The "power up" start delay circuit doesn't work half of the time, but also if I have the motor go into backup (battery) power, I'm not there to push the DPDT Momentary to restart the motor. Worst of all, on rare occasion, after it's running, it will go into a condition of all phases (X1/Y1/X2/Y2, based on the X/Y axis principal) either staying on or staying off. Strangest of all, maybe because we get to close to the sun? (ha ha), it even hangs with X1 staying on and all other phases off (after it's been running). Maybe all of this is V cutout or insufficent A. I figured though, the way to solve this is to have a circuit monitor the motor, and a relay cut out the direction selections automatically.

So far, I have an X-OR made from a 7400 (Quad 2-input NAND) that drives an NPN to supply an astable 555 with a repeating Gnd signal to the reset pin (2), and I monitor the Y1 & X2 phases. It works great. If both of these phases are on, or both off, the timer powers up and sends a signal to the relay to reset the motor (via the 74194). Since X1 occasionally stays on all by itself it is not being monitored by my circuit and I haven't seen it keep any other phase on indefinately (like X1), so I don't see much concern with Y1 or X2 staying on. But if it does (one of them gets a low and the other a high without further oscillating), my X-NOR (X-OR & NPN) sends a low signal which STAYS on the reset pin / timer never starts charging.

I've thought this through, how can I possibly integrate determining that both of these inputs (Y1 & X2) "occasionally" oscillate (go low to high in each cycle), so I know that one of them is not "hanging"? I've thought of using JUST the inputs (w/o X-OR<w/NPN> // X-NOR), gating them WITH the X-NOR, and gating them at the end of the X-NOR's decision, but I can't finger this one out. Anybody have any ideas what gates and configuration to use? Remember, if Y1 or X2 is high and the other low, the X-OR (w/o the NPN) puts out a High, and the X-NOR puts out a low. I need a REPEATING low into the 555. Even with numerous additional transistors & chips, maybe I could do this, but I just can't figure out how to gate it all with the minimum number of discreet components and chips (maybe one chip and a few transistors). Anybody???

Maybe to make it easier to understand...

X1_Y1_X2_Y2 === X-OR(no NPN) === X-NOR (current notes)

0 = 0 = 0 = 0 === 0 =========== 1 (all phases off)
1 = 1 = 1 = 1 === 0 =========== 1 (all phases on)
1 = 0 = 0 = 0 === 0 =========== 1 (X1 stuck / reset mode?)
~ = ~ = ~ = ~ == 1 =========== 0 (each phase oscillating)
0 = * = * = 0 === 1 =========== 0 (fails if either * stays L)

I must have both monitored phases (Y1 & X2) go FROM low to high to reset timer / keep relay off. If either STAYS low, the 555's capacitor won't charge & the timer won't activate the "time out" relay for driver reset...

For those of you not interested, I solved it. With an additional Astable 555 Timer (now a 556), and it's reset pin connected to the X-OR (before the NPN), when either Y1 or X2 is high and the other low, it's reset gets a high. If it doesn't cycle through (hangs), the timer charges it's capacitor and eventually starts timer cycling. So now it's one timer getting the X-OR's inverted signal (X-NOR) and another timer getting the X-OR as is.

So how did I tie them together for a single relay? With a NOR gate built from a few 2N2222 (NPN) transistors! I had to really cut back on it's current limiting transistor though, to drive the (reed) relay's coil (and a status LED). If either NOR input (timer outputs) are high, it's output is low for the relay. With the NOR it's possible to have two high inputs re activation of both timers (or two low inputs). But, since both timers are being driven by the SAME gate (X-OR / X-NOR), only one of them can be activated at a time. This is because the X-OR holds the X-OR timer AT reset with a continuous low output, and it "opens" the NPN for the X-NOR timer <reset is at Hi-Z>. When either Y1 or X2 inputs go low and the other high, the X-OR puts out a high so only the X-OR timer starts charging (the X-NOR timer is held low via the high applied to the NPN base). An FYI...

good job, but it'll help a lot if you have posted the circuit earlier.

Actually, the two go to a NAND gate built from a couple 2N2222s !!