Synchronous Buck Converter with Negative Feedback Loop

[sers000]

Hello,

I am in the midst of creating a synchronous buck converter. The requirements of the converter is the following:

• Vin = 30V - 50V
• Vout= 3V - 5.5V
• Io >=12 A

Now the power stage works perfectly with ideal as well as realistic components. After investigating that the power stage works, I started working on the closed loop feedback circuit following voltage controlled mode (duty controlled ) approach. When the VR1 is 1.06V and Vref is 5.5V, the compensator amplifier is outputting 4.44 V so the first half of the feedback seems working. I was not sure what the ramp voltage should be and the internet didn't help much to be honest. The main issue is that the output voltage varies greatly when the input voltage changes within the specified range. I have been trying to figure out this issue for the past month but not much progress so far. I will appreciate the help and thanks in advance

 

[rjenkinsgb]

My first thought is that the error amplifier should be much higher gain - enough to go from very high duty cycle to very low duty cycle over the acceptable range of output voltage.
Try higher value feedback resistors or a high resistance preset in place of R2.

You will likely also need some compensation to prevent overshoot and oscillation, eg. possibly a capacitor and resistor in series, from output to negative on the error amp.

ps. I don't know switch 2 should be in it at all?

 

[sers000]

My first thought is that the error amplifier should be much higher gain - enough to go from very high duty cycle to very low duty cycle over the acceptable range of output voltage.
Try higher value feedback resistors or a high resistance preset in place of R2.

You will likely also need some compensation to prevent overshoot and oscillation, eg. possibly a capacitor and resistor in series, from output to negative on the error amp.

ps. I don't know switch 2 should be in it at all?

hey rjenkinsgb,

Cheers for your response. The second switch 2 is essential in synchronous buck converter which is really the main difference between it and the non-synchronous buck converter topology. The whole idea is that I'm investigating the benefits of using a synchronous topology.

Here is the latest update to the topology which I got help from someone outside of electro-tech-online.com. Right now the schematic works as needed, however, I want to understand why and how it is working. The confusion I am having is why the first amplifier "U1" so significant in this case? As per literature, I never saw such approach.

Regards,
sers

 

[kubeek]

Your ramp really should go from 0 to some positive value to be close to reality, as i have no idea if the opamp output can go negative.

 

[rjenkinsgb]

U1 is providing gain, as I suggested in my previous post, just separately rather than upping the gain of the comparator stage.
It's also inverting the error signal, which could equally be done by swapping the comparator inputs.