testing stability by feedback responce technique question

Stability normally done closed loop as thats how the circuit will
be configured and operated. And clearly closed loop versus
open loop gain and phase will be different with and without fdbk.

You can do stability analysis either in time domain (looking at
pahse margin, with a scope or sim) or frequency domain (your sim).



I added R6 into gate of MOSFET as AD8034 only rated to drive 35 pF. I found
10 ohms kills oscillation.



G and Phase plots versus 1 ohm, 10 ohms, you can see the effects of too much Cload on AD8034.

Hello Dana, u would like to learn the feedback response method .
As I said in the original post , there is some impedance thing when choosing where to breat the loop , is there a way I could see that the point impedance is correct in spice simulation ?
Thanks .-

You can always keep the loop closed, and add a current source onto a
node to measure Z at the node. As the current source will not load the
node.

Not sure why you are insisting breaking fdbk loop is going to give you
stability certainty that actual application will run under. Especially in light
of circuit affected by lack of proper loading closed loop incurs. If you
reconstruct, on the fdbk network, its loading than you can get a better
result on what the fdbk network, and rest of circuit, is providing.

Also always look at specs in datasheet, especially for fast OpAmps, on
Cloading, common mode signal ranges, and supply bypassing. It will save
you a lot of grief.

Not sure what your input signal looks like but Pdissipation in the MOSFET looks
like this for a 1V RMS input signal, eg. consider if using SMD package and higher
input signals thermal considerations.