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The question...To buffer or not?

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eTech

Well-Known Member
I have a circuit that contains panel mounted pushbuttons, PB1-3.
See attached.

U101A,B is a 74HCT174 Dual D Flip Flop. NOR's are 74HCT02.

There is about 5-10 inches of wire from each leg of each pushbutton
to the circuits on each PCB (2 PCBs').

The question:
Should I use a hex buffer as shown (dashed symbol) to buffer the signal? 74HCT07?
Or maybe I actually need additional buffers to each PB?

Suggestions?

thanks
 
Last edited:
I wouldn't have thought a buffer was necessary. I would be more concerned with overcoming switch bounce.
 
Hi Alec...

Do you think the debouncing shown in the circuit is adequate?
I was thinkin maybe adding buffers might help with debouncing,
but I wasn't sure if I needed more debouncing..
 
Switch bounce may result in a train of pulses lasting several millisecs in total. I don't see anything in your circuit with a time constant long enough to cover that. I see 1k/.01n combos on the IC inputs, but the time constant there is only 10 microsecs. Also, slugging the clock input of the latches like that may be a problem as the latches need rapidly rising and falling clock edges.
 
Using a Schmitt trigger buffer, such as the CD4584, with an input RC time-constant of at least 50ms, should provide a good debounce function while still having a fast rise-time output.
 
Those caps ar 10nF not .01nF
I would put a small value resitor in line with PB3 to protect the output of IC101a(?) E
 
Those caps ar 10nF not .01nF
My bad. Should have typed .01u.
You can connect the '174 as per the attached to provide debounce.
 
Hi canad...
So the debounce looks ok as is right? Except for adding a
small resistor, say... 1K ohm?
Thanks
 
How does your circuit help debounce?
When the button is pressed the clock input of the latch goes high/low/high/low/.....umpteen times because of contact-bounce. The first high toggles the latch. If we assume D was, say, low at the time then Q goes low and not-Q goes high. Because of R2/C1, D takes about 50mS to change from low to high. During that 50mS any further clock pulses will all try to set Q low, i.e. they can't flip the Q state rapidly low/high/low/high.... Interestingly, Crutschow also refers to a 50mS time-constant for debouncing.
 
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