A design should never rely on a tristated gate to provide a valid logic level. Tristate buses should always be controlled by one of the devices on the bus. See the schematic of a 74LS04 below. The 18k resistor is the cause of your problem. If you need the transistor to be off, you'll need to provide a pulldown on the bus. You can connect a 1k resistor to GND from the TS input, or you can use the signal that controls your TS device to turn on another NPN which pulls the input to GND when it is supposed to be tristated.