Rich D.
Active Member
After much grief getting assembly code to compile and download on MPLAB-X, I have everything I ever dreamed of, but this dream turned into something less than I expected. For reasons unknown to me, this simple LED flash code doesn't seem to execute. It does simulate OK in MPLAB V8.xx
The two pins I want to use as LED outputs are named "TDI/PMA9/CN35/RA9", and "TMS/PMA2/PMALU/CN36/RA10".
On the PIC24FJ128GA406, these port A pins are not on the peripheral pin select list, so that's not it. They share a function with JTAG, but if I'm not mistaken that function is normally disabled. They also share Parallel Master Port output port functions, and I believe that is disabled on reset also. They also share with interrupt-on-change inputs. They are also not analog input pins which would be the default state. So what else is left? This is the simple looping code, with a short delay between state changes:
;BCLR ANSELx, #9 no analog function on '204 chip
;BCLR ANSELx, #10 "
BCLR TRISA, #9 ;OUTPUT PORT A BIT 9
BCLR TRISA, #10 ;OUTPUT PORT A BIT 10
BCLR ODCA, #9 ;DISABLE OPEN-DRAIN OUTPUT MODES if used (yes on '204)
BCLR ODCA, #10
;..............................................................................
; MAIN LOOP BEGINS HERE
;..............................................................................
infiniteloop:
;turn on 9 (10 off)
BCLR LATA, #10
BSET LATA, #9
CALL DELAY_A_BUNCH
;turn on 10 (9 off)
BCLR LATA, #9
BSET LATA, #10
CALL DELAY_A_BUNCH
done:
BRA infiniteloop
;..............................................................................
; MAIN LOOP END
;..............................................................................
;..............................................................................
;Subroutine: Delay a bunch (not calibrated to any specific time)
;..............................................................................
DELAY_A_BUNCH:
push.d w0
clr.w w0
clr.w w1
Outer_Loop: nop
Inner_Loop: nop
inc.b w0,w0
bra nz, Inner_Loop
inc.b w1,w1
bra nz, Outer_Loop
pop.d w0
return
Any answers to this puzzle or even educated guesses would be most welcome. I might* even accept an insult or two if it will shed light on the puzzle.
* might, not will...might
The two pins I want to use as LED outputs are named "TDI/PMA9/CN35/RA9", and "TMS/PMA2/PMALU/CN36/RA10".
On the PIC24FJ128GA406, these port A pins are not on the peripheral pin select list, so that's not it. They share a function with JTAG, but if I'm not mistaken that function is normally disabled. They also share Parallel Master Port output port functions, and I believe that is disabled on reset also. They also share with interrupt-on-change inputs. They are also not analog input pins which would be the default state. So what else is left? This is the simple looping code, with a short delay between state changes:
;BCLR ANSELx, #9 no analog function on '204 chip
;BCLR ANSELx, #10 "
BCLR TRISA, #9 ;OUTPUT PORT A BIT 9
BCLR TRISA, #10 ;OUTPUT PORT A BIT 10
BCLR ODCA, #9 ;DISABLE OPEN-DRAIN OUTPUT MODES if used (yes on '204)
BCLR ODCA, #10
;..............................................................................
; MAIN LOOP BEGINS HERE
;..............................................................................
infiniteloop:
;turn on 9 (10 off)
BCLR LATA, #10
BSET LATA, #9
CALL DELAY_A_BUNCH
;turn on 10 (9 off)
BCLR LATA, #9
BSET LATA, #10
CALL DELAY_A_BUNCH
done:
BRA infiniteloop
;..............................................................................
; MAIN LOOP END
;..............................................................................
;..............................................................................
;Subroutine: Delay a bunch (not calibrated to any specific time)
;..............................................................................
DELAY_A_BUNCH:
push.d w0
clr.w w0
clr.w w1
Outer_Loop: nop
Inner_Loop: nop
inc.b w0,w0
bra nz, Inner_Loop
inc.b w1,w1
bra nz, Outer_Loop
pop.d w0
return
Any answers to this puzzle or even educated guesses would be most welcome. I might* even accept an insult or two if it will shed light on the puzzle.
* might, not will...might