TMR0 overflow within Interrupt. What will happen?

Hello all,

I was thinking of designing an application which use 2 interrupts, i.e. timer and counter at the same time. I've read an article saying that it wont go into 2nd interrupt without resetting GIE. So my question is, when the program runs within an ISR and I havent done anything to GIE, at the same time TMR0 happens to overflow, will the TMR0 intterupt happens AFTER the first interrupt exits and return to normal code? let me clarify further:

TMR1 interrupt occurs -> ISR routine -> within ISR, TMR0 overflow -> will the interrupt occurs after ISR complete its routine OR just will the code ignore TMR0 interrupt at all?

referrence to previous post:
https://www.electro-tech-online.com/threads/interrupts.32781/

The second interrupt won't occur until interrupts are re-enabled, it won't be ignored though.

Nigel Goodwin said:

The second interrupt won't occur until interrupts are re-enabled, it won't be ignored though.

Click to expand...

thanks. That helped..

regards,
SKY