As the FET is configured the U2 op amp gain can vary from 1 (follower) to about 6.3 with the FET going from off to full conduction.
It doesn't sound like that's what you wanted.
Edit: If you want the output to go full-off then add a 10kΩ resistor in series with the + input to U2 and connect the drain of J1 to the junction of that resistor and the + input.
Connect R5 to Vref.
As the FET is configured the U2 op amp gain can vary from 1 (follower) to about 6.3 with the FET going from off to full conduction.
It doesn't sound like that's what you wanted.
Edit: If you want the output to go full-off then add a 10kΩ resistor in series with the + input to U2 and connect the drain of J1 to the junction of that resistor and the + input.
Connect R5 to Vref.
My bad; at a certain point is a voltage follower. Yes!
I want the output following the modulation imposed by the signal at the gate, as you say, output full-off.
Not sure I understand your proposed changes (much less why). I will try to work it out.
Gracias Carl!
/Edit to add:
No time yet to play with LTSpice but what you are suggesting is to stop messing with the gain setting and implementing an attenuator for the input. Am I right?