In fact I have no idea what's going on with the circuit connected to the sources of TR2 & TR3 ....I'd imagine that the gate of TR3 sees a replica of the TR2 gate signal ...but how that's acheived is beond me...any light anyone can shed would be most welcome!
This circuit is a pretty classic differential long-tailed pair with a constant-current source. TR3, the non-inverting input, is biased to a constant 0V for a single-ended input with a differential output. The circuit with TR4 is set to draw a constant current of roughly 7mA through the MOSFET pair (~3.5mA per MOSFET).
For PAin = 0V, I believe you would probably expect to see about -3V at the sources, about +370V at the drains, and about 0V at the gates.
Just for reference, here is a simplified view of what is effectively going on, with the differential probes marking the differential output of the amplifier stage. As an additional note on the circuit above, D21 is a protection diode that prevents the voltage at TR4 from exceeding the maximum rated VCE for that transistor.
R38 /39 are overheating badly (apparently this is a known problem & happens due to voltage leakage from the drain to the gate - the solution is apprently to drill a hole in the pcb between the gate & the source (it's all in the video at the top of my opening post, but at least now I know the correct approximate DC voltages & (what to expect AC signal wise) & can progress acordingly.
Thanks once again!
Edit: Problem now fixed...that youtube video was bang on the money - leakage due to a bad pcb between the FET drain & gate ...drill a hole in between those pins - problem gone!