i hav written vhdl code in modules... i need to combine them.... any one of them should work depending on the bit pattern such as
when (signal = 00) => program 1;
when (signal = 01) => program 2;
when (signal = 10) => program 3;
when (signal = 11) => program 4;
how can i do this... plz help...
when (signal = 00) => program 1;
when (signal = 01) => program 2;
when (signal = 10) => program 3;
when (signal = 11) => program 4;
how can i do this... plz help...