Via at SMD pad question

[Speakerguy]

What if any are the problems associated with placing a via directly on an SMD pad? The software I used at my old job (Mentor Graphics PADS) had a setting in the autorouter to either allow or disallow the placement of vias on SMD pads (like on a surface mount capacitor pad to tie it to a ground plane). Does this pose problems during reflow or what caveats about the practice should I know?

Thanks!

 

[Mikebits]

What if any are the problems associated with placing a via directly on an SMD pad? The software I used at my old job (Mentor Graphics PADS) had a setting in the autorouter to either allow or disallow the placement of vias on SMD pads (like on a surface mount capacitor pad to tie it to a ground plane). Does this pose problems during reflow or what caveats about the practice should I know?

Thanks!

I have never seen a via directly on a pad. What I have seen though is the via off to the side of the pad. Kinda like [] []o

 

[3v0]

I was thinking the via hole plating process would result in a raised area on each side of the PCB. The part could not sit flat. Maybe check with the PCB people.

 

[Speakerguy]

Sad thing is I've actually done it before at that same job, but I think I had the technician assemble that board for me.

 

[3v0]

If I may back peddle.

Yesterday when reading about a QFP chip they wanted you to put vias under the chip to help the solder vent gases as large center pad under the chip reflowed.

 

[Mikebits]

I found an article that may interest you.

Here is a blurb from the article.

While the use of via-in-pad technology is no longer regarded as an unacceptable way to resolve a design problem, it should only be used if no other options are available. Because of additional steps and material required, the requirement for filling vias adds to the cost of manufacturing the circuit board, and may have a negative effect on yields. In addition, the choice of circuit board fabricators is limited to vendors who indicate that they have the capability of properly filling vias. Proper filling is emphasized, as circuit boards with improperly filled vias will incur additional costs during assembly to correct the problem. Corrective measures required will include identifying and fixing defective vias prior to the application and reflow of solder paste, as well as additional inspection and post-reflow rework to ensure that affected solder joints have sufficient solder.

Link to article.
SMT - Vias in SMT Mounting Pads

 

[Mikebits]

I would say, for hand soldered boards, this may be okay, but anything else I would think not a good idea.

 

[eng1]

What if any are the problems associated with placing a via directly on an SMD pad? The software I used at my old job (Mentor Graphics PADS) had a setting in the autorouter to either allow or disallow the placement of vias on SMD pads (like on a surface mount capacitor pad to tie it to a ground plane). Does this pose problems during reflow or what caveats about the practice should I know?

Thanks!

If any via is left open, solder will be sucked through the hole and the result will be a bad joint. Also, small solder spheres could be generated on the opposite side of the board with the risk of short circuits.

If you use vias to improve thermal performances of IC's - as for QFP/QFN packages for examples - I would make sure that solder is not applied over.

 

[Ubergeek63]

there is no problem with having the via under the pad as long as there is sufficient solder paste to fill the via as well as solder down the part.

Another trick used is to put a solder resist grid down ensuring all the solder does not go down the hole. It is often an iterative process to determine how much paste to put down to ensure a solid joint while preventing the formulation of solder balls.

Dan