I am about to make a perfect D flip-flop out of simple gates. I used 74ls00 as illustrated in the diagram. It works perfectly alone but when i connect its input to a circuit it started to work incorrectly. Example is this. I connect its Q' to its D input. Q is supposed to be 0 then 1 then 0....but it works indefinitely. As if it is in undefined state What causes this? How can I fix it?
there is some thing wrong in your connection, when Q' is low that is connected to D input, when E goes high imediately Q' comes high and D goes low, this has to be prevented.
Edit: you have to add another latch stage driven by inverted clock input to enable it and take the feed back from that output. see the attached pic
did you check the one i posted? in your circuit you are allowing both inputs to go high simultaniously by your feedback and its not allowed. you get 1 in both out put, you may be right, i beleive your latch is oscillating with high frequency.
you have to make an intermidiate latch as i suggested to hold the feed back until the clock goes high/low
The only problem with the original is that the input stage gets a clock to each gate, D input to one gate and D NOT to the other input. The out put of this section connects directly to the input of the RS section without any type of crossover.
This is the most straight forward version of a D Flip Flop I have encountered. The state of D is transferred to Q One clock transition later. Sorry about the quality of the drawing but I have to use Paint since I can’t load foreign programs onto my system.
This is the most straight forward version of a D Flip Flop I have encountered. The state of D is transferred to Q One clock transition later. Sorry about the quality of the drawing but I have to use Paint since I can’t load foreign programs onto my system.
you are right, this is the common way when your input is external and the input only changes when the clock is low. the OP needs to utilise the out put fed again to the input, that is where the problem is.
Then I guess it is time to pull the drawing of a 74LS175 and check out the difference in the two circuits. The one I posted was from the web and was the simplest form. There is another configuration that uses 7 gates total including one set up as an inverter that allows preload and reset. It uses 3-input NAND gates in most locations.