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The caps are 10nF.
The two AC connections link in to two pins on the clock CPU via resistors and the common of the diodes connects to 0V (circuit ground).
Looking at the other LED display connections, It appears to be a two-phase multiplex; there are not enough "segment" outputs on the CPU to drive every segment individually.
It looks to drive half on one half cycle and the other half on the opposite half cycle.
The two connections alternate between a positive voltage and a diode drop negative (~ -0.6V) each half cycle. The CPU can synchronise the segment outputs to feed whichever two digits of the display are being powered by each alternate half cycle, so display all the digits with less connections than would be required if event segment was connected individually.