Hello everybody,
Another clock recovery question. Thanx for helping me on
the first question.
Now I have definite specs I am working with. Which are:
1) Wireless baseband baseband receiver for image sensing applications.
2) Very high frequency band (2~8GHz).
3) Low power design (less than 10mW).
4) Not very fast (10~30Mbps).
To say more details, I am responsible on the baseband area of the wireless communication. That is, my work starts directly after the signal is demodulated. I dont care about how it was demodulated or how it was received. I just receive digital baseband signals and I need to continue the work from there.
Now here is where I need your comments.
First, I am thinking of using NRZ data. This way I can recover my information using a very high speed sampling clock, which can help me know my bit width and then sample once around the middle (ie. this is not oversampling).
Do u recommend RZ or shall i stick with NRZ?
Second, what do u think is the best method to recover my data (make a decision)? ofcourse knowing that I am concerned of having as low power consumption as possible.
Third, Do I really care what was the modulation type used to modulate my signal at the transmitter? Since im working AFTER demodulation, do I really care about that?
Fourth, Whats after I receive and make a decision about my digital data? What is the next step in ur opinion?
Fifth, I am using verilog to build my system so I can test it on an FPGA. My design should be ALL DIGITAL, so im not allowed to use verilog-A.
Any idea how I can test such a think of an FPGA?
Thank you for helping me. Im still a beginner in actual designing so I need a push at the start so I can continue later on my own.