I have added the pin functions to the diagram.
I think that it is running once per minute. The output of the CD4024 that is being used is Q6 which divides by 64, so the first CD4017 is clocked at 0.5 Hz. The two CD4017s divide by 5 and 6 so the whole thing is 1/60 Hz, or once a minute.
I have labelled the transistors. Q1 is turned on for 10 seconds every minute, and the current to the clock will be a short pulse which finishes when the big capacitor charges up.
I have shown the Q2 as an NPN transistor, the same as Q1. Q2 is not a PNP transistor. If it were, it would be turned on when Q1 is turned on, so the supply would be shorted.
I think that Q2 is being used in an unconventional way, either by mistake or in a quite subtle way. It is being used as an emitter-follower, but the emitter and collector swapped. As long as the base-emitter junction does not break down, which it shouldn't at less than 6 V, Q2 will work as a transistor but with a very poor gain.
The base of Q2 is taken high for 10 seconds every minute, 30 seconds after Q1 was turned on. The purpose of Q2 is to discharge the big capacitor ready for the next pulse.
If Q2 turned on and provided a low impedance path, the capacitor would discharge just as fast as it charged, which could have an effect on the clock. By swapping collector and emitter, the gain of Q2 will be far less, maybe less than 10, so the discharging of the capacitor will be at a low current which will mean that the solenoid in the clock does nothing during the discharge.