wschroeder
New Member
Thank you. It's getting late here and I play too late and too much. If you think of a solution please post something... I'll pick it up in the morn. Amazing how a simple interrupt can throw a wrench into a good thing....
Edit:
Before I go... how about deducting a couple TMR1L cycles right before doing that instruction. You would get an error of 30 - 60 or more cycles at 100ns each out of the whole 20ms. That wouldn't hurt anybody. But it could prevent an interrupt at the wrong time. It would require a little change in how the RCIF test is done and acted upon. Just a tired thought and maybe the same problem.
Edit:
Before I go... how about deducting a couple TMR1L cycles right before doing that instruction. You would get an error of 30 - 60 or more cycles at 100ns each out of the whole 20ms. That wouldn't hurt anybody. But it could prevent an interrupt at the wrong time. It would require a little change in how the RCIF test is done and acted upon. Just a tired thought and maybe the same problem.
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