vne147
Member
Yes, the idea being that a 1k resistor will provide a suitable load to stop the supply voltage from getting above the brown out voltage of the CPU (anyone know what the BOV is?) and prevent it being "back powered"
Mike.
Got it. That makes sense to me now.
BTW, to have identical boards means repeating the circuit for however many PIs you have on every PI. Assuming each slave will listen on a different pin and the master will output on many pins to address each slave. Seems excessive.
Could there be a software solution so that you send all communication to all PIs with an address identifying which PI it's for?
Mike.
Yes the circuit will be repeated as many times as there are RPis networked together. They will all use the same GPIO pin regardless of whether that RPi is the master, or one of the slaves. The master RPi will configure it's GPIO as the output, and set a global enable/disable bit for the entire network. All other RPis will be slaves and configure their GPIOs as input.
As long as they see the master telling them to enable, they go about their business. If the master pulls that bit low, everyone halts and modes to a safe condition.
All the communication that requires the master to individually address a slave with be done via ethernet.
This discussion that started this thread is more or less a backup safety measure that's just intended to tell the system as a whole that things are OK, or to stop everything when it's not. There will also be redundant signals sent through ethernet.