555 as vco

[kep]

is any one know how the voltage in pin 5(control Voltage pin) of 555 timer effect to the out put frequency of 555 voltage control oscillator. i mean is there linear combination between voltage in pin 5 and out put frequency

 

[bobledoux]

Look here:

 

[kep]

thanx bobledoux it is good site but my still i didn't get clear good answer i need some more help

 

[Roff]

I ran some simulations, and it is quite linear for V5 in the range of 0.1*Vcc to 0.9* Vcc. Be aware that, as the voltage increases, the frequency decreases.
The equation is fairly complex.

 

[kep]

thanx Mr. Roff it is true i did some experiment on this and linearity of the curve show only for some configurations ( different values for r1 r2 c 555 is astable mod) for others it show some non linear pattern

 

[Roff]

I tried two configurations. One was the "standard" astable multivibrator circuit in the datasheet, with Ra=10k, Rb=68k. The other configuration was with the resistor from pin 3 to pins 2 and 6, with the cap from pins 2 and 6 to GND, Pin 7 is left disconnected. Both circuits had excellent linearity.

 

[kep]

again thanx for reply i did not simulate i just fixed parts to bread board connect some wires and measure the out put frequency by varying voltage in pin 5
for Ra=100k(+-5%) Rb=1k(-+5%) c=0.1uF(+-10%)ceramic fixed capacitor
use NE555 timer IC and voltage in pin 5 varied form 0 to1.5v the was supply =9v
had a roughly a straight line of slop 92Hz/v

for Ra= 100k(+-5%) Rb=10k(+-5%) c=0.1uF(+-10%)ceramic fixed capacitor
and same as above for other condition i had a non linear (skewed curve )

is it because of error on component or was i follow a wrong procedure ?

 

[Hero999]

The duty cycle also changes too.

The correct term is pulse position modulation.

 

[Roff]

The duty cycle also changes too.

The correct term is pulse position modulation.

I see that the datasheet calls this configuration a pulse position modulator. It's true that the low output time remains almost constant as the voltage on pin 5 is varied.
It's still a VCO. A rose by any other name...

 

[Hero999]

Still, it's important to note the change in duty cycle as it might be important for some applications.

If you require a constant duty cycle, calculate the capacitor and resistor values for twice the frequency and add a D flip-flop to divide the frequency by 2.

 

[kep]

hi all
so Mr Ron what do u mean by low output time?
so is still mean that output frequency is linearly related with voltage in pin 5

 

[mramos1]

He means the time the square wave is LOW (at pin 3 output) stays pretty constant but the HIGH time varies in width as the frequency changes.

If you need a 50/50, see Hero999's post.

 

[Hero999]

Or use the NE566 and save yourself the bother.

 

[kep]

hi all
thanx got da idea

 

[Dean Huster]

Although the 566 function generator is cute with both triangle and square wave output, it isn't nearly as versatile as the 555/556. There have probably been more DIFFERENT types of circuits designed around the 555 that there have been around the op amp.

You can't ever get exactly 50% duty cycles from a 555 without some external tricks (like the binary divider at the output). But for most purposes, especially if you're varying the frequency, setting Ra to a value of 1K ohm and then selecting the timing capacitor to keep Rb at least 10 times higher than Ra and finally selecting Rb for the desired output frequency will normally give you close enough to a square wave for all but the most demanding applications.

Note that Signetics does the duty cycle "upside down" in their equations. For the 555 output, a 75% duty cycle is high 1/4 the time and low 3/4 the time, just the opposite of what you're normally taught. Not sure why they did that ... it was always confusing to me.

Dean

 

[Roff]

Although the 566 function generator is cute with both triangle and square wave output, it isn't nearly as versatile as the 555/556. There have probably been more DIFFERENT types of circuits designed around the 555 that there have been around the op amp.

You can't ever get exactly 50% duty cycles from a 555 without some external tricks (like the binary divider at the output). But for most purposes, especially if you're varying the frequency, setting Ra to a value of 1K ohm and then selecting the timing capacitor to keep Rb at least 10 times higher than Ra and finally selecting Rb for the desired output frequency will normally give you close enough to a square wave for all but the most demanding applications.

Note that Signetics does the duty cycle "upside down" in their equations. For the 555 output, a 75% duty cycle is high 1/4 the time and low 3/4 the time, just the opposite of what you're normally taught. Not sure why they did that ... it was always confusing to me.

Dean

Hi Dean,
With the VCO (pulse position modulator, whatever), the duty cycle changes a lot if you vary the voltage on pin 5 over a wide range, regardless of what sort of RC configuration you use.
For fixed frequency, a CMOS 555 with the R from output to pins 2 and 6 and the cap, and no connection to pin 7, the duty cycle will be nominally 50%. Any error will be due to mismatches in the 3 resistors in the internal voltage divider, and differences in output pullup and pulldown resistances (insignificant for large values of timing resistance).

 

[Dean Huster]

You can't ever get exactly 50% duty cycles

But Ron, doesn't that still make the above statement correct, albiet a very slight error from exactly 50%? I was working from the classic/standard 1972 Signetics datasheet configuration: Ra from +V to pin 7; Rb between pins 7 & 6; pins 6 & 2 connected together and to the timing cap (other end to ground). Where you could get 49.99999999999999999999999% but not 50.0000000000000000000000%.

Added seconds later: Hey, I notice you have the metal detector avatar back! Any plans yet for a vacation through here?

Dean

 

[Roff]

But Ron, doesn't that still make the above statement correct, albiet a very slight error from exactly 50%? I was working from the classic/standard 1972 Signetics datasheet configuration: Ra from +V to pin 7; Rb between pins 7 & 6; pins 6 & 2 connected together and to the timing cap (other end to ground). Where you could get 49.99999999999999999999999% but not 50.0000000000000000000000%.

Yep, you're correct. It's an analog solution, so it will have some error. It could be greater or less than 50%. Of course, if you wanted to get really technical, you could say that a divide-by-two on the output will also not have a 50% duty cycle, because rising and falling propagation delays are not equal.

Added seconds later: Hey, I notice you have the metal detector avatar back! Any plans yet for a vacation through here?

Dean

We're going to MN for a wedding in May. Why don't you come up and visit us? I think it's only about a thousand miles.
We might go to GA after the wedding. Maybe we can stop by your hogan on our way back to Idaho.

 

[eblc1388]

When connecting the CMOS 555 output pin as the charging/discharging source for the timing capacitor, one should take care that even a small 10mA loading on the output pin would drop/raise the output(satuation) voltage by one volt and thus one would easily get a LCO (load controlled oscillator) in return.

 

[Roff]

When connecting the CMOS 555 output pin as the charging/discharging source for the timing capacitor, one should take care that even a small 10mA loading on the output pin would drop/raise the output(satuation) voltage by one volt and thus one would easily get a LCO (load controlled oscillator) in return.

Very true.