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8 bit binary to bcd circuit

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girbie5

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Hello people,
I'm a newbie here and i really need assistance from you guys.
I am designing a 4x4 bit multiplier, but after I get the outputs, i have to convert the 8bits output to bcd in order to display it on a 7-segment display.
So if you plz can you plz help me and give me the circuit for conversion.
Thank you so much, i would really appreciate your help
 
For Natural BCD you just group the binary in groups of 4 bits each. For raw binary to BCD there are chips to do the conversion.

At the bottom of this page, the process is explained

**broken link removed**
and
**broken link removed**
 
I need the best optimized way to build the circuit and thats where my problem is. so if anyone has a specific design or any suggestions, i would love to hear from you.
thank you TheOne for your help
 
how about small microcontroller?
 
How did you design your multiplier? Because it seems very strange as the design of the multiplier in hardware should be as complicated, if not more complicated than what you are asking!

Ref : **broken link removed**

But if you are really implementing it in hardware, why not just do a direct input-to-7-segment conversion using boolean algebra?

Lastly, if the conversion is simply for display purposes, then you probably don't need a hardware solution. Like what others have mentioned, maybe a microcontroller solution would be good for all your needs.
 
I am to design a shift & add multiplier What i did so far is:
i designed the controller using an fsm, designed the datapath for my circuit.
what is still missing is how to convert my outputs that are put in shift registers into binary coded decimals and then to show the output on a 7seg display.
i have to build the circuit using different types of chips
 
The whole task would be much easier if you used a microcontroller. But if the project requires a hardware solution, then maybe it's easier to use boolean algebra.
You first create a 256-entry truth table, deriving all 7-segment outputs given all 256 possible inputs.
You store the entire truth table into ROM, and there you have your logic circuit in a single EEPROM. No need for the messiness of sequential circuits or state machines.
If the project requires a logic circuit based on gates, then I guess tough luck. You'll probably have to do a lot of boolean simplification and maybe Karnaugh maps.
If you insist on using your current multiplier, then the steps should be the same as the above, except your circuits are no longer optimised.
 
Hey thank you checkmate. I guess i have to do the 256 truth table entries and do the k-maps for it. i am not allowed to use ROM'sor fpga's or anything. just logic gates. .. so i guess its gonna be tough luck for me.
so what i was wondering about is if there is any way of simplifying the work because a 256 truth table entries is a lot to deal with ...
 
Here is another one solution, you need two truth tables, know how to get a nibble (4 digits that they aka a Hexadecimal number) and a adder...


The first table will have at max two BCD digits:

Code:
table A
0000 | 0000 0000
0001 | 0000 0001
·
·
1001 | 0000 1001
============= -> from this part the translation isnt direct ;)
1010 | 0001 0000
1011 | 0001 0001
·
·
1110 | 0001 0100
1111 | 0001 0101

The second table is the next power of 16... a number like FF is 15*16+ 15*1 = 255 and with this second table you can translatte more than 8 bit binar numbers, because you can always directly know the next power...

The thing is that it will have at max 3 digits (240 = 15*16)
Code:
table B

0000 | 0000 0000 0000 = 0
0001 | 0000 0001 0110 = 16
0010 | 0000 0011 0010 = 32
·
·
·
1111 | 0010 0100 0000 = 240

By the way, you know that from 10 the high order will have a 1, yu can optmize it a little pheraphs????? that is if there is a 1, the others dosent matter ;)... play with this tables and pheraphs some thing can be minimized more.....


Also now that you know, you can merge in memory both tables....

Code:
Mix a and b

0000 | 0000 0000 || 0000 0000 0000
0001 | 0000 0001 || 0000 0001 0110
·
·
1001 | 0000 1001 || 16* 9 (in BCD sure)
1010 | 0001 0000 || 0001 0110 000 = 16*10 = 160
1011 | 0001 0001 || 16*11
·
·
1110 | 0001 0100 || 16*14
1111 | 0001 0101 || 0010 0100 0000


In that way you will have a 5*4b = 20 bytes per line and there are 16 = 16*20 = 320 bytes instead of the other table about 12 bytes per line and 256 entryes... 12*256 = 3972 bytes......


Then you can extract the nibles, access the table the first part for the unity and the second for the second nible (the high order) andd you ad them...
1111 1111 = 0010 0100 000 + 0001 0101 = 0010 0101 0101 = 255 ;)


Dont know if that will require more work, also havent played for know if I can conert with this method some about 32 bytes in binary number to BCD, but I guess should be easy... ;)
 
From a similar question on another forum. I did not get feedback on whether this was the solution. Copied from an old TTL book.**broken link removed**
 
For the first impression at less it have the suficient output for "plot" the maximun BCD in a byte.

Pheraphs is some like what I have described, there is the posibility.

I will try to check it in a crude way (not a deep test).

I have only finded taht the 185 is a "Binär zu BCD-Kodeumsetzer" some like binary to BCD codifier"??? dont know the exact translation :).
 
Thanks a lot for your help everyone, i appreciate your concern.
All the stuff that you are saying are very helpful to me. this is a great forum by the way :D
 
The problem is that the device seems to obsolete.
 
binary to bcd

well howsitgoin. I need to also drive 2 seven segment displays using a 8051. I have the bcd to 7 seg decoders but i want to know how to get from 8bit bianary output to 2 bcd numbers .software solution in mcs 51 assembler would be grand.
 
A 16 bit binary to BCD routine can be found **broken link removed**. Perhaps you can adapt it.
 
Re: binary to bcd

jimbob jones said:
well howsitgoin. I need to also drive 2 seven segment displays using a 8051. I have the bcd to 7 seg decoders but i want to know how to get from 8bit bianary output to 2 bcd numbers .software solution in mcs 51 assembler would be grand.

Hi,
You need to use 3 displays to represent 0-255 in an 8bit binary value. If you want to use 2 displays you have a hex-display (0-F). For that you need no conversion, just shift the nibbles.

If you want to convert a binary value to3x 7-segment, I would use a table lookup cheme. 2(1.5) bytes for each value. You then take each nibble through a 7-segment conversion table, to get the 7-seg code.

You could use a small shift and add routine from a bit-bcd value table as in the post above.

If you only want to convert 0-99 to 2 displays you could use this code as a start. This was made for Motorola 68HC16, but I think you can use it in most of the 8bit micros. You only need the DAA instruction. (The strange things in the end of the list, is the way to set and reset the carry-flag.)

Code:
*-----------------------------------------------------------
*
*	bin2bcd - routine compute from binary value to bcd
*
*	Entry:  regA - binary value
*
*	Exit:	regA - 2 bcd digits
*
*-----------------------------------------------------------

BIN2BCD:
	CMPA	#100
	BCC	BIN2BCDE		; >99
	PSHB
	TAB
	ANDA	#$07			; lo 3 bit
	LSRB
	LSRB
	LSRB
	LSRB				; bit 3 in carry
	BCC	BIN2BCD1
	ADDA	#$08			; bit set
	DAA
BIN2BCD1:
	LSRB				; bit 4 in carry
	BCC	BIN2BCD2
	ADDA	#$16			; bit set
	DAA
BIN2BCD2:
	LSRB				; bit 5 in carry
	BCC	BIN2BCD3
	ADDA	#$32			; bit set
	DAA
BIN2BCD3:
	LSRB				; bit 6 incarry
	BCC	BIN2BCD4
	ADDA	#$64			; bit set
	DAA
BIN2BCD4:
	PULB
	ANDP	#\$0100			; set ok
	RTS
BIN2BCDE:
	CLRA
	ORP	#$0100			; set out-of-range flag
	RTS

-----

TOK ;)
 
hello,
i need 5-bit binary to BCD converter.
i know about it but i can not design 5-bit in proteus.
is there any one help me?
if you can please help me


**broken link removed**
 
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