about CD4016/66 e.c.

[ci139]

ran a sim. to get the apx. max. f range for CD4003/13
which to my surprise turned out is that the PN-latch performs better with not so homogenous elecronic switch
the other factors here is that paralleling gates makes it worse , also reversing the resistance graph (green , at left on fig.) to ascend towards Vdd won't work so good -- does anyone know the exact PN-latch (Pass Gate) circuit they use in CD4003 CD4013
or can comment about how uneven resistance graph results in better performance

fig.

 

[ronsimpson]

The maximum frequency depends on the supply voltage and the load type.
Probably depends on what you are doing with the 40xx.

 

[ci139]

it turned out the non homogeneous Pass Gate didn't pass misc. tests on a longer run - so i came out with a new one

i'm still interested about real 4003/13 realistic max clock speed ±5MHz