AC control circuit question

[Kerim]

Hi Shawn,

For instance, your thread gave me a new idea for my (industrial) SCR controllers. It will be based on the first driver circuit of the welder you referred to on your OP.

My controllers could be programmed by the users (in the simplest case, to set the timing, in cycles, for the on state and off state). So I will substitute the controlling hardware resistor by an isolated (via a transistor opto IC) circuit to emulate a varying resistor (using PWM).
But, as I have mentioned always, the only serious drawback in using one pulse per half cycle is that the controlling resistance should be not allowed to decrease below a certain limit. Unfortunately, this limit depends on the design of the transformer and its input magnetic lagging current at the highest possible mains voltage (Edited: But it can be determined experimentally by observing, while decreasing slowly the controlling resistance, when the output power is almost full).

For decades, I used a ferrite transformer (with windings isolated for 380Vac) to trigger each SCR by a 'stream of pulses' that start from the triggering phase and stop before the half-cycle end.

Kerim

Edited:
Yes, one snubber serves both.

 

[tcmtech]

BTW if you get rid of D3 and C5 it will solve your turn off problem being every half cycle the circuit voltage will be dropping to zero thus resetting the PUT. With that in mind setting up the charge timing on C4 to match your pedal resistance should be easier.

Also, if you use pots for R3 and R8 you can use them to set up your foot pedal to have adjustable min/max range limits. The rest of the timing will just be a matter finding the right value for C4 to match your line frequency.

For a rough reference of how low of values you can use with a UJT in these types of circuits.

If you can't get the PUT to work with your foot pedal potentiometer range there is always the 555 timer IC method.

Similar component count and no more difficult to work with.

 

[spec]

Am I right in saying that if the 0V of the 12V supply in the schematic of post 57 were connected to the neutral supply line, the circuit could be greatly simplified by eliminating the need for the opto-couplers?

spec

tcm- our posts crossed

 

[alec_t]

SCR1 is in parallel (reverse parallel) with scr2 so one snubber circuit serves both

That snubbing arrangement should work, providing wire lengths are kept short in reverse-parallelling the SCRs.
I tried simulating the SCR drive part of your circuit in LTspice, but couldn't get the SCRs to switch off when supplying an inductive load.

 

[ShawnR]

Changed the attached image in post #57. I had uploaded the wrong version. Does not change much of the conversation since then. Sorry if it added confusion. Change to note is the way the PUT is connected

 

[alec_t]

Here's the sim result.

Regardless of the pot setting, and for R6 anywhere in the range 100Ω to ~15kΩ, the SCRs don't turn off other than very briefly and at a non-adjustable part of the cycle, so there's no transformer current control . Also, each LED current pulse is only ~13ma for ~18us, so it's doubtful whether you'd notice the LED on.

 

[alec_t]

I had another play with the sim, with D4 and D5 re-positioned as steering diodes across the gate-cathode terminals as per the linked SP100 circuit, and with different SCR models (I'm not suggesting the SCR type modelled is suitable for your application). Now the SCRs do turn off, however the sim highlights a problem which may have accounted for your SCR failure. If the pot setting is between about 30% and 70% you get symmetrical switching in both half cycles; but if the setting is outside that range the triggering is erratic and fails in one or other half cycle. This would result in the magic smoke escaping.
Here's the result for a pot setting of 80% :

The problem seems to be due in part to the incomplete discharge of C4. It can be partly cured by adding a reverse-biased diode across the pot to ensure C4 discharges fully, but there are still pot settings where the symmetrical triggering fails.
The circuit seems particularly sensitive to the choice of C4, the pot value, the LED, the opto current transfer ratio, and the SCR gate sensitivity.

 

[ShawnR]

thanks alec. We could take out the led since, as you pointed out, I would not notice it on anyways. Also, I could change the 500K pot out. I was hoping not to but not a big deal so that would allow me to perhaps find some values that work better, ie choose a larger cap that perhaps delivers a more reliable trigger pulse?

Thanks for running the simulator circuit. I did not think when I got into this project it would become so time consuming.... price of learning I guess. I am certainly learning a lot. Cheers,

 

[ShawnR]

What do you guys think of the attached idea?

Things I have been considering that have me going in circles (maybe I should have gone with the 555 circuit tcmtech...;-) )
A 60 hz half cycle is 8.3 mseconds. That means that my peak is achieved in about 4.15 mseconds so how do I charge a capacitor to a higher trigger voltage when the last 90 degrees is decreasing. Therefore a key must be for a trigger voltage of a very small value, something that the positive going wave achieves easily in the first say 10% of the phase.... In the circuits I have been posting, my input is clipped at 12 volts so in 90 degrees (4.3 mS or less since it is clipped, it reaches that )

Because I have been trying to use the foot pedal as built (500k) I have been struggling with driving the led in the opto triac and yet have enough current to provide a solid enough pulse to illuminate the led to fire the triac output, and the control SCR's. I have been trying to figure out from datasheets, the minimum pulse width, input currents, trigger currents, etc. I know, testing on the bench would have answered a lot of questions but my schedule lately is not allowing that so trying to hammer out the theory.

To use the programmable unijunction transistor, we set the trigger point by biasing the gate and when the anode goes above this point by 0.7ish volts,the PUT conducts and stays on till the anode current falls below the valley current point (feel free to chime in here if I am wrong or off a little)

So why not move the foot control to the gate lead of the PUT and vary it from 1 volt to 11 volts. (an interesting article on littlefuse.com points out that very little power is available in the first 30 and last 30 degrees of the phase so you really want to work in the 30 - 150 degree range). Shutting it off at 150 degrees would be ideal, from what I have gained here, in order for the magnetic field to collapse before the SCR is enabled again for the next cycle. Although we cannot shut off the control SCR, when the current in the PUT is reduced to a point of shutting off (declining amplitude of phase plus resistance in circuit), at least we know the opto triac will be off.

Now on the phase delay (RC circuit), the peak value is reached in 4 ish mseconds. We may need a delay of up to 8 mseconds to reduce our welding current so our RC should yield that and therefore (should follow behind rising power curve) and then we Trigger the PUT at a value somewhere in that rising 8 msecond portion. I know my terminology is lacking but I hope you get the idea.

tcmtech, in the first diagram you posted in post #62, tmax is 15 ms and if I read the datahseet correctly, the UJT should fire at 2.5 volts so kind of the same idea..except I propose to vary my trigger point on a fixed charge curve rather than change the charge rate...

What do you think? Totally wacked idea?

Added...
As I look at it some more, the 80K resistor will limit my led current to about 125 uAmps so not enough to illuminate. Will the discharge of the capacitor be enough for a pulse to activate the control scr? I suppose I could put a larger capacitor in for C 4 and reduce R3 to about 1 k? reasonable? C would be about 10 uf. bonus is a more substantial drive pulse for the optotriac..?

 

[ShawnR]

I have some success!!

The last circuit did not work. The PUT would not shut off ....so here is the next version. I added a small mosfet to control the opto triac. This allowed me to configure the PUT anode current to be reduced below the valley current point but yet drive the opto triac led....and I was able to control the output, although...
......as I adjusted the control, R8, my trigger point varied nicely from just above 1 to about 8.4 volts, then it flipped to about 6 volts and continued to reduce the output power. From the waveform, it looks like I lose half of the wave, lower half but that might must be my scope flipping the image. For test purposes, the output is simply a 12 vac source driving two resistors. I took a video of the controlling action but not sure how to upload it.

 

[Kerim]

By curiosity, I simulated the original SCR dimmer. These are the results I got. I also uploaded the LTspice files.

Kerim

 

[ShawnR]

Here is the link to the video. I should have talked as I was making it to explain what I was doing but, basically, I am varying the foot control, R5 to determine how far it can be varied before the waveform breaks. I had a DVM on the trigger point Vg, gate of PUT. Because I appear to lose one half of the wave at one point (where measured Vg goes from 8.4 volts to 6 volts), (note at 0:11 in the video for one example of "losing half the wave"). I would like to figure out how to maintain the waveform throughout the range of about 30% phase to 150% phase. This should give me enough control of the welding current. From what I have read about TIG welding, the user sets the maximum current expected at the welder, and varies it down with the use of the foot control as he is working the bead, or as the molten metal puddle dictates. Hoping to work on trigger points a little more today.

Also, my output is being measured across a resistor connected to the triac of the opto coupler as shown in the diagram attached and posted in one of the images in the previous post. I thought I should start there but I wonder if this is introducing errors in data. I will build more of the actual control circuit and see if it make a difference although I suspect it will reflect what we are seeing in the video.

Attached is the actual test circuit for the making of the video and as far as I have gone so far.

Kerim, thanks for running it through the sim software. If I am understanding correctly, it looks like half the wave is falling off too at a point. That is interesting. In general, is your evaluation good or bad?

 

[Kerim]

The simulation shows me that I was wrong about the minimum limit of R12 (the main controlling resistance).
I mean, even if one SCR is still on after a zero-crossing (due to the inductive lagging current), the next triggering pulse won't occur till this SCR is off again and the capacitor of the other SCR is charged enough to the threshold voltage of its diac.

For this circuit to work properly, its symmetry should be made as perfect as possible.
In other words, C1 and C2 should be selected (from a lot) so that their characteristics are as close as possible. This also applies on selecting the two diacs.
In the simulation, C1 and C2, also the two diacs U12 and U22 are assumed identical. But if they are not, the triggering phases of the two half-cycles would be different and this leads to a DC current in the transformer primary that could overload one SCR in the least.

Kerim

 

[tcmtech]

I'm thinking that the 555 timer IC concept might have been simpler to work with now.

 

[ShawnR]

Lol tcmtech. I would not have learned as much as I have. Now that I feel I have made some progress, I want to get this put circuit to work. I will try a little longer and if no luck, then try to figure out the 555. I have a microcontroller concept in my head too. That probably would have been the easiest for me but then I think i would have run into other issues anyways. I won't be at the bench for a few days now.
Cheers,

 

[tcmtech]

Well, you probably know more about PUT timer circuits than I do now.

 

[Tony Stewart]

Attached is the latest version. I am wondering if D6 is a bad idea, an LED to indicated trigger on. Any input appreciated.

Changed attached image. I had uploaded same one as previous.

Thanks, Cheers, Shawn

D6 idea is good, but the implementation has no current driving it to see it.
Even if R series is correctly lowered it will be very dim, due to duty cycle.

I would scrap the entire circuit and redraw in a more logical flow. Your SCR triggers are wrong polarity and back to back diodes will force SCR on always. There is also no gate leakage bleed R on the SCR to prevent false triggers from EMI.


Use a Schmitt pulse stretcher cct for the LED trigger (1 shot)

I suggest you start with current , voltage and power specs and work backwards from output.
. If you want a variable phase pulse current,define the peak current and duration of pulse. I will let you think this thru. TReat each semi as a switch with a current gain for trigger. Since thryristors , both SCR & PUT are two stage transistors , for best saturation and low heat loss use a current gain of no more than say 250. maybe even 100 e.g. Ip= 50mA pk 1ms

But Iput For low current , 10k gain is possible since each transistor may have hFE of 100 worst case thus 100x100 but for single transistor switches we follow specs of 10:1 or use 50:1 when the current results in low power drop. Thus 10x10=100 for an SCR unless "sensitive gate type.
PUT can use high R values but the Anode must be draining a low ESR cap to pulse the SCR.

Observe all device limits and use prudent margins.

For max current, less gain is better for reliable triggering. PLs revise the R values to below peak currents of each device or choose better devices to do this.

The main difference in PUT vs SCR

Both are two Transistors PNP on top and NPN on bottom to create PNPN except PUT gates are the middle N or VBe to the PNP to Anode and SCR Gates are the middle P like Vbe to the lower NPN to cathode.
The characteristics of PUT make the gate voltage, gate current and another other intrinsic parameter programmable and the SCR is fixed. Thus the PUT symbol shows the gate arrow up towards top (Anode) and SCR towards bottom <-ve> Cathode.

Both have a negative resistance slope from regenerative internal feedback until Anode current drops below Ih holding current (unlatch)
Normally PUTs are used to discharge Caps not connect large R's , so,please redo and read transistor specs carefully and example test circuits.

 

[ShawnR]

Thanks for the input Tony. At this point, I am still plunging forward (too stubborn to be wise, I guess). With the quote you used, it is from Page 3 of this thread. I feel like I have had some success since then, considering posts 70 and 72, on page 4.

I have not had much time lately on the bench. I do like the idea of the Schmitt trigger but again, I will have to research them. If I am best to use a 555, then maybe it will be getting to be time to go to the 555 based control circuit, as suggested by tcmtech.

I don't update every variation I do on the bench so sometimes move ahead of the most recent post. It would only matter if any of you were actually crunching numbers or building the circuits along but I believe the last change I made was the changing of C4 to .047 uf and maybe R3-R8. My purpose here is to achieve an RC of about 10 mseconds. But then, since the charging pulse takes 4.3 ms to get to peak, I am not sure how to calculate at which point the PUT will be triggered (in time) since I am varying the trigger point. Might just be a yard sale at this point.....Tony may be right...scrap it but .......for now, I am still finding it interesting. Soon, it might get frustrating...;-)

Cheers,

 

[Tony Stewart]

I can think of a dozen ways to improve this design from scratch. There is too much dependance on source signal load regulation, overdrive current , polarity trigger differences.
I would start from output specs and work backwards to ensure required trigger is stable under all conditions.
For phase pulse generation, I might consder a square>> triangle wave to comparator and one shot with proper voltage/current drive for reliable operation.

 

[ShawnR]

Summer came to a close around here so I finally got back to this project. I decided to abandon the PUT circuit and go with a timer based circuit. (As was suggested more than once.....I know.... ...)

The circuit seems to work well on the bench with a resistive load. Any input?

Thanks
Shawn