A quick way to eval your debounce circuits use your DSO, set for single trigger/single shot
mode, timebase ~ 5 mS / box, and see what you get. A cmos gate w/o hysteresis, as inpost
5, eg. the input, can sit long enough (with a cap tied to input) at threshold that with
power supply noise can cause gate to oscillate. Look at your power supply rail with DSO,
set to infinite persistence, say 1 mS / box, AC, 100 mV vertical sensitivity, and see how much
pk-pk noise you have. Its usually an eye opener.