Battery PWM loading

[Mosaic]

I'll prob go with both a 1K pullup and the schottkys

Does this look ok for rev. polarity protection for the 6V batt?

 

[crutschow]

....................
Does this look ok for rev. polarity protection for the 6V batt?

View attachment 93089

No. That configuration will conduct for either polarity of V2 since Vgate will still be positive for either battery connection.

For it to block the reverse direction you need to interchange the source and drain (drain to V2 minus) and connect the gate to the normal plus side of V2.
The gate will then be positive and current will flow from source to drain in M2, which is fine since MOSFETs conduct equally well in both directions when ON.

When V2 is reversed, Vg of M2 will now be negative, shutting off the transistor and preventing the normal direction of current flow from drain to source through M2.
For M2 to be ON completely for normal operation, M2 needs to be a logic-level type device that fully turns on at a Vgs of 5v or less [not Vgs(th)].

 

[ronsimpson]

I would add a diode in series with R1 and remove M2.

 

[crutschow]

I would add a diode in series with R1 and remove M2.

That would need to be a 10A diode, which will require a heat-sink, whereas the MOSFET won't if it has sufficiently low ON resistance.

 

[ronsimpson]

And the MOSFET has a diode across it that might upset things.

 

[crutschow]

And the MOSFET has a diode across it that might upset things.

Not if it is connected as I proposed.
When the N-MOSFET is ON it is conducting in the reverse direction (source to drain) in the same direction as the diode, so the diode has no effect.
When the battery is reversed, the N-MOSFET is gate is biased off and the voltage is across it is in the normal direction, plus-drain to minus-source, with the substrate diode being reverse biased, so no current flows.

 

[ronsimpson]

What are you using for 0.65 ohm 8A resistor?

 

[Mosaic]

oops...posted that w/o checking it.
Anyway, here's a mod. to permit non logic NFET polarity defense...
Seems ok?

RON...some 16 AWG nichrome.

 

[ronsimpson]

I did something like this for 12V and 24V automotive.
I used head lights for a load. Easy way to dump watts.

 

[crutschow]

oops...posted that w/o checking it.
Anyway, here's a mod. to permit non logic NFET polarity defense...
Seems ok?

View attachment 93095

So you want the circuit to work for either battery polarity? Is that correct?

If so, your circuit has a problem since the switched cap circuit uses the battery connection as a ground current path and M2 blocks that path.

To get it to work properly, connect M1 and M2 in series with sources connected together. Connect R2 from G to the source junction.
Place M1 and M2 in series with R1.
Connect the battery between node V1 and node SCom.

Below is a sim of that circuit.
Note the reversal in battery polarity at 30ms, causing a reversal in the PWM current direction through the load resistor, as expected.
Edit: Also note the polarity and voltage rating of C1 and C2.

 

[Mosaic]

Cruts do u think an emitter follower push pull to drive the gates would be a good idea to reduce switching latency as these Nfets have large gate charge?

 

[ronsimpson]

Cruts do u think an emitter follower push pull to drive the gates would be a good idea to reduce switching latency as these Nfets have large gate charge?

Well...perhaps. I have access to a 1Khz pulse already so no osc.

I have asked about switching frequency and only got a hint about 1khz.
At 1khz I would not bother. At 100khz there is a need for a "gate driver" of some type.

 

[crutschow]

Whether you need a gate driver depends upon the PWM frequency and the gate charge of the particular MOSFET you use.

I assume you can use a low frequency for controlling the battery discharge current.

Note my edit to post #30 about capacitor polarity and voltage ratings.

 

[Tony Stewart]

I'll prob go with both a 1K pullup and the schottkys

Does this look ok for rev. polarity protection for the 6V batt?

View attachment 93089

Considering this device has < 3 mΩ with Vgs=6 and the load is >200 x bigger at 650 mΩ, across 6..5V for a 10A load, have you tested any advantage to all this effort to drive >> Vbat=6V. ?
So the 60W load results in 60W/200 = 0.3W dissipation in the chip. at some ? duty cycle.

 

[Mosaic]

I did up a sim with the Opamp oscillator and tweaked efficiency with an NPN driver to get > 10V gate drive with a 12V supply and ordinary switching diodes.
The reason for the low latency drive of the NFETs is that I am using the pulse width as a calculated control to deliver average load amps. Significant latency compromises low average current control. The peak current is ADC sampled and the pulse width for the desired average is calc'd. This is so because the Nichrome load increases resistance with temperature.

Via testing I have found that most of the latency is in the OPTO. Biasing it's NPN base with a resistor to ground helps this.




Edit: thx for the C1 voltage..it was not obvious!

 

[crutschow]

What is your PWM frequency?

 

[Mosaic]

488.25Hz

 

[Tony Stewart]

I suspect you are exceeding the absolute max spec of Vbe=-5V by an unfavorable margin from the positive clamp then Vbe is forward biased and maybe 10V input swing.

 

[Mosaic]

I suspect you are exceeding the absolute max spec of Vbe=-5V by an unfavorable margin from the positive clamp then Vbe is forward biased and maybe 10V input swing.

I need to ask you to explain that a bit more.

Edit:
ok , i see, I clamped it with a silicon diode.
Alternatively, reducing R5 to 1K keeps the V swing within spec.
Thx!

 

[Mosaic]

Encountered something strange with the LM358 oscillator prototype. I could only get one 'old' stock LM358 (DIP) to oscillate, newer LM258s (DIP) and SOIC lm358s were no go.

From looking at other OPA oscillators it appears that much higher resistances than that used in the sim may be required which started to cause BOM issues again. Anyway, I decided to keep it simple by dropping the OPA and using a PNP to make an RC oscillator.
That worked out ok and I am getting 11V no load and 8V with a 1K load.
Oscillator & charge pump fit on 1 sq in of PCB using smd parts.

EDIT:
Did some bench testing with the opto today. It's emitter follower drive capability requires a < 470K base - emitter load to reduce switch off latency to manageable sizes.

The FET gate-source needed an additional 0.1uf cap to dampen drain-gate parasitic capacitance noise (to < Vth) as the drain is subject to a lot of hi energy ringing from the outbound connection.

This requires the push pull drive to switch the capacitive load within a few microsecs.