'ello!
I wasn't expecting it to work because the lower FET has the charge around the gate and drain, but modifying an LTSpice example shows otherwise with the voltage drop across both being equal.
Anyone able to validate if it's a LTSpice quirk or whether it will work?
I wasn't expecting it to work because the lower FET has the charge around the gate and drain, but modifying an LTSpice example shows otherwise with the voltage drop across both being equal.
Anyone able to validate if it's a LTSpice quirk or whether it will work?