In Falstad's sim you can choose a user-slider with variable voltage that shows the applied voltage. I chose a gate voltage interactively. By default, it starts at 0 to 5 but you can edit that range. This is much faster than editing LTSpice. Falstad's is the best tool for level 2 simulation where you add your own discrete parasitics if you want. You can define a dozen characteristics for a diode if you wanted but not have a library. So it is far faster. But LTSpice and TINA are better for Level 3 using specific component models but setup time is greater and feedback is static.Where is the Gate Bias supplied from here?
gm I calculated for this mosfet was too low and I think that is why it is impossible to use it for an amplifier. I gave up after working for few hours with no results.Let me confirm how Falstad's Sim computes gm when you hover over the FET after you choose Vt & Vgs then choose RdsOn with the link and it computes beta so you can finish the design of a closed loop Common Source amplifier that is almost insensitive to gm and Vt and Vgs if you allow a 10% tolerance in gain reduction from drain loading adding to the Rfb value.
Here I chose a FET much like IRLHS6342 but instead of a switch, used it as linear amplifier. This might be a poor design for other reasons, but it proves how to design an AC control gain in Common Source Amp.
You can do the same in LTSpice to see the frequency response effects of Rfb and Qgs=11nF @1V then decide how to improve by matching Z(f) ratios.
View attachment 139029.
Take Away
The bottom line here is you cannot make an accurate gain design with an open loop Common Source FET as you can with a Common Emitter with simple gate voltage biasing due to Vth tolerances.
gm is too sensitive to Vgs-Vt and Vt has too wide a tolerance.
Av=−gm*R(Drain)
The reason is for BJT's diodes at 1.0 mA such as Vbe are pretty close to 0.6V for most transistors. Above this current, bulk resistance adds to the voltage rise with significant variation based on power ratings. You can bias Ie and Ve/Re pretty easily from Vb. But FET gate voltage is far more senstive near threshold for Ron and Vth has a typical 2:1 voltage range tolerance.
e.g.
- 2 to 4V for standard FETs or
- 1 to 2.5 for the ON 2N7002 or
- 1.1 to 1.9 for the Toshiba version. T2N7002 ( tighter tolerance on Japanese parts)
- 0.5 to 1.1 for the IRLHS6342 Rds(on) max (vgs = 4.5V) 15.5 mΩ International Rectifier
For giggles how much gain-bandwidth can you get from a closed loop IRLHS6342 in a Common Source Design at 4 mA drain?
But you can simulate the DC and low-frequency characteristics accurately knowing how to use negative feedback. High f (HF) and higher RF demands more experience in geometry and impedance control.
The root cause of gm too low was the excess difference of currents with too low a current for Vt which should’ve been 25 µA. Which resulted in over biasing of Vgs. Had you used the bias for that Vt your gm would be much larger. This is the common threshold for high Rdson parts.gm I calculated for this mosfet was too low and I think that is why it is impossible to use it for an amplifier. I gave up after working for few hours with no results.
I see. I tried different bias voltages later with no luck after that while keeping Rd 10k and Rs 1k with no luck. I also got rid of bias resistors and tried adding DC offset from the AC source itself to try like 700mV but nope nothing worked. I never got more than 1 times gain. I don't know how to use feedback on transistor amplifiers but I guess I will find that out in the next analog circuit design lecture.The root cause of gm too low was the excess difference of currents with too low a current for Vt which should’ve been 25 µA. Which resulted in over biasing of Vgs. Had you used the bias for that Vt your gm would be much larger. This is the common threshold for high Rdson parts.
You’ll notice by using negative feedback Vgs is only slightly above Vt which allows for greatest gain with a grounded source and also easy self bias.
I don't know how to use feedback on transistor amplifiers but I guess I will find that out in the next analog circuit design lecture.
I understand this but I don't know how to design multiple transistor amplifiers that are more stable and causes less distortion of the input signal. For this time I was trying to make a single simple amplifier like you described yet it refused to work in Cadence. I will personally ask the teacher why.The basic concept is very simple, for the type of circuit you started with.
Think of the transistor (Bipolar or FET ) as a source follower / emitter follower:
The voltage across the source or emitter resistor will vary (almost) the same as the gate / base voltage varies.
(Assuming everything stays in practical limits.)
I'll stop using both device type designations & stick with bipolar, though it still applies to both.
So, the current in the emitter resistor will vary in proportion to the source voltage. It work as a voltage controlled current source (or sink), with the current controlled by the base voltage.
That same current, or nearly so, passes through the collector. That means the voltage across the collector load is also, indirectly, proportional to the base voltage & emitter current.
If the collector resistor is equal to the emitter resistor, the voltage changes will be the same, but inverse, the collector voltage reducing as the emitter voltage increases.
If the collector resistor is eg. 10x higher value, you get 10x the voltage across it as on the emitter - and 10x the voltage change as on the emitter. The emitter is following the base, so 10x voltage gain base to collector.
Adding a resistor and capacitor across the emitter resistor increases the AC signal gain without affecting the DC bias calculations, so you can get high gains without excessively high ratios of collector to emitter resistance that make DC biasing difficult.
You just have to set the resistor values for sensible current for the transistor in use and the application, and set the base bias voltage appropriately to set the emitter and therefore collector voltages to allow a good voltage variation in both positive and negative swing; eg. collector probably somewhere between half and 2/3 supply, depending on gain etc.
That's partly from looking as the device data and partly experience.
[Neither bipolar or FET devices exactly follow the ideal emitter follower / source follower voltages, due mainly to the base current passing through the emitter resistor with a bipolar transistor, and the gate-source voltage varying with source-drain current with a FET - but the concept and basic principles above apply].
Is that a saw oscillator. I didn't know you could do something without diode and just 4 bjts.View attachment 139269Sorry, I thought you were looking for a better circuit design, not a level 6 FET parameter design.
You might want to modify your schematics to be more readable and eliminate dots and use the same color background as your document or a neutral or pastel shades.
vs hard to read this
View attachment 139268
- also avoid jagged lines and loops and reduce blank space or group in logical ways , this is a SAW osc.View attachment 139275
Yes my original circuit was garbage because I forgot to connect the bias to gate. The thing with mosfets in Cadence is that their output resistance is low and it is pulling the Rd to a lower value since they are parallel -gmRd becomes -gm(Rd // ro). And bias voltage gets hard to decide because Vt changes with Id. Increasing the Width of the mosfet increases Id and gm but after some point it loses its effect. Because all variables are tangled to each other I can not apply the normal mosfet knowledge I got at advanced electronics class in analog design class. LTSpice simulation just doesn't cut it at that level. Also body effect decreases the effective resistance of the diode connected mosfet and decreasing its equivalent resistance. When I should get 22 times gain I get like 6-10. Considering all that and adjusting the values is to difficult.Here's an update of your original ltspice circuit, set up as I described.
Note that the original did not have any connection between the bias resistors and gate!
(The mosfet is just a small signal one I picked at random from the available parts).
View attachment 139276
Yes I Rs would make it more linear and stop gain from being dependent on gm but teacher asked for 10 gain which was impossible to have with source resistance since it decreases gain.You appear to have the source grounded in the Cadence circuit (though it's difficult to make out).
You must have a source resistor to stabilise the bias and device current.
I don't have cadence so I cannot do anything with that circuit.
All Spice based simulators are likely quit similar in their accuracy but, I think Falstad uses a different and simpler simulation engine, so I would not expect it to be as accurate.so would listen to anyone on why one
sim is better than another.
My example has more than 10 gain, with a source resistor!but teacher asked for 10 gain which was impossible to have with source resistance since it decreases gain.
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