Capacitor Input Impedance

[Ardni]

Hi all,
I am planning on using the AD8138 differential driver to drive an ADC (https://www.analog.com/static/imported-files/data_sheets/AD8138.pdf) and I have a quick question about it.

The signal that will arrive at the input, will have a DC level of possibly 2.5V which I want to remove. To do this we want to place a capacitor before the input stage to the differential driver. My question is will this affect the impedance which we want to match to 50 ohms?

We want to use the device in a differential configuration. Although we eant to remove the DC component of the input signal, we cannot find where it says what levels of DC the input signal can have. It only seems to give a values in db´s of arounf 75db´s.

Any advice would be grately appreciated.
Thanks

 

[Oznog]

If you use a capacitor, you will create a highpass filter. This may or may not be desirable.

Spec sheet, with Vs=+/-5V:
DC PERFORMANCE
Input Voltage Range ±3.8V

Why do you want this chip? What ADC do you want to talk to? Lots of apps- most actually- just use an ADC without an amp chip. If the signal is too small, sometimes a more accurate ADC is cheaper and simpler than an amp.

 

[Ardni]

Thanks for the reply Oznog.
We want to interface to a AD9640 ADC. We were thinking about using this device as it wasrecommended in the datasheet and to adapt the input imedance to 50 ohms and give it the prefferred DC level of 0.5(Vdd) which is 0.99V.

What other options are available. Should we be looking at another method to interface this signal to the ADC?

Thanks for the help

 

[Nigel Goodwin]

Why 50 ohms? - that's just making life MUCH more difficult for no obvious reason?.

Really it all depends exactly what you're wanting to do, and so far it's pretty vague. But if you want to DC block using a capacitor, do it AFTER the 50 ohm load resistor (when it's feeding a high impedance).

 

[Ardni]

Thank you for the reply Nigel,
On page 16 of the datasheet of the differential driver (https://www.analog.com/static/imported-files/data_sheets/AD8138.pdf) it shows how the circuit should be configured for a differential configuration (which is what we want). It says that the input impedance is equal to 2*Rg. What I am unsure about is where I should place the blocking capacitor, as I will have to take into account the feedback resistor, and I´m not sure what implication the capacitor may have.

Please advise on where one could place the blocking capacitor. Also please let me know if you require any further information.

Many thanks

 

[Nigel Goodwin]

Where is the signal coming from?, if there's an unwanted DC offset on the signal, remove it before you get this far. The very low input impedance pretty well ensures you need a buffer to feed it, remove any DC offest in that buffer.

 

[Space Varmint]

Run the signal through a capacitor (series). That will decouple the DC. The formula for the impedance is:


XC = 1 / 2pi * fC

 

[Ardni]

Where is the signal coming from?, if there's an unwanted DC offset on the signal, remove it before you get this far. The very low input impedance pretty well ensures you need a buffer to feed it, remove any DC offest in that buffer.

Thanks again for the reply.
The signal is coming from another board (RF board, IQ module) and sends a differential signal of the IQ signals, each one with a DC component of 2.5V (but not yet finalized). Rather than conforming to this, we are planning to remove the DC level so that in the future we should be able to connect whatever board (without fixing it to only being able to use boards which provide a signal with 2.5V DC)

Is the only option to remove the 2.5V in the IQ module board and send the signal without DC, or can we somehow block it on our board which has the converters? We would prefer to block it on our board as another company are doing the other (RF) board.

When you say "remove any DC offest in that buffer", what exactly do you mean? in the differential driver? how exactly would I do this, without adversely affecting operation?

Thanks again for all the help

 

[Nigel Goodwin]

It's difficult to make suggestions without the complete circuit, but if you're trying to block DC feeding a low impedance you need a fairly MASSIVE capacitor in order to pass low frequencies. So it's best to block where it's a high input impedance, and a capacitor can be fairly small. Or simply offset an opamp to remove the DC offset, an 'adder' in opamp terms (add -2.5V to the input, and that cancels out the +2.5V).

 

[Space Varmint]

Guru? Wake up! This is his cup of tea ain't it Nigel?

If you set up the biasing of the input after the decoupling cap., with a high impedance, it will be much more forgiving as to the output impedance of the board supplying the signal. So if their output impedance is lower you will have maximum voltage transfer which is easier to deal with. That's what I would do. I would use a high impedance buffer amp at the input after the decoupling cap.

 

[audioguru]

The source signal is "a differential signal each with a voltage of about +2.5V". Then there is no DC offset voltage between the inputs of the differential amplifier so the DC blocking capacitors are not required.

Like all opamps, the high frequency opamp has less bandwidth when its gain is more than 1. If it has a gain of only 1 then its output is not powerful enough to drive a negative feedback resistor with a value as low as 50 ohms.

 

[Ardni]

Thank you audioguru for the reply. That makes sense that we don´t need to conver ourselves with the DC component when the signal is differential. So am I correct in saying that, as the AD8183 has an input voltage range of +/- 3.8V, we can drive a signal of 1.3V peak into the differential driver (given that it has a DC component of 2.5V? If this is correct then I think I understand pretty well. Please verify. Thanks

P.S. We would like to invite those who helped us today to a paella in Madrid if you are ever over this neck of the woods!
Thank you all once again.

 

[audioguru]

Thank you. Comos Tas. (My Spanish is not good).
My wife is from Spain near Madrid. We have not been there for many years and a paella will be very nice.

 

[RCinFLA]

Differential amp can and do have DC offset. The Analog Devices line driver spec of +/- 1 mVdc is a common worse case spec for device on-chip matching for bipolar devices. CMOS devices are commonly +/-5 mVdc matching tolerance.

The actually output DC offset will depend on how much gain you set up the differential amp for and the luck of draw on IC processing matching. This is a particular problem when you put gain in front of the ADC. The amplified DC offset eats up some of the ADC dynamic range.

There are 'zero' offset amps that have a self calibration process that runs in background to zero out DC offset.