How is a 10 Meg ohm DVM meter loading it down? or pulling it down?
Are you saying it's a voltage divider?
The only schematic you showed us has two 148 opamps feeding the inputs of a 4001 NOR gate through 100k series resistors. All of them are powered from +13V.
When the outputs of the opamps are high then they are about +12.5V. If you connect a 10M ohm probe to an input of the NOR gate then the voltage divider caused by the 100k resistor being loaded to ground by the 10M ohm probe causes the +12.5V to drop to +12.4V.
But the Cmos logic low is about +3.9V or less so THERE IS NO WAY that the resistance of the probe causes the logic high to be low enough for the Gate to change states but interference picked up can.
So the Probe lead has capacitance making connection with the PCB board trace or node capacitance , creates a current draw?
The probe has such a small amount of capacitance then I don't think it will cause logic to change states but interference picked up can.
So what Meter probes can I get that are shielded?
An oscilloscope probe and a logic probe are both shielded and are suitable for testing logic inputs. A DVM is not.
Oh, maybe you can use a DVM if you are in the middle of the Sahara desert (or on the planet Venus) where there is no mains hum and no radio interference.
An Oscilloscope probe is 10 megs, I just measured it today and now you're saying that High Impedance is picking up interference , etc.
So how is an O-scope good to measure logic levels when it's high impedance?
An Analog Meter is low impedance, is this better to use when measuring logic state or what is a problem with using an analog meter when testing logic levels?
Why don't you understand that the ordinary wire and probe connected to the input of the DVM are an antenna? They pickup mains hum and interference from the air because they are not shielded and because they feed the high input impedance of the meter then the interference does not have a low impedance voltage divider to ground. Connect your 'scope probe to the red wire of your DVM to SEE the hum and interference.
A 'scope probe and its wire and a logic probe are shielded so they do not pickup interference then their high impedance is good, it is not bad.
So a Logic Probe, so low impedance ? and has shielding?
The impedance of a logic probe must be fairly high for it to measure your Cmos circuits. It is shielded so it does not pickup mains hum and interference.
Why is there potential differences? and where does the potential differences come from?
When I measured ohms between each ground , it was in the milliohms , so they are tied together and not isolated? what would I measure in ohms to know if the grounds are isolated?
The voltages are only a maximum of 0.018V above ground so of course they are tied together.
Does it matter? Will only o.018V at the input of TTL or Cmos logic cause it to be a logic high? No, because you discovered that the input of a gate must be at least a few volts to be a logic high then millivolts do not affect the logic.