Hello people I am trying to make current fed full bridge DC/DC converter.
Specifications:
input voltage-30V to 45V
Output voltage 350V
Output Current 14A.
I have attached my LT-Spice file
Problems:
1-Simulation is slow
2-ripples in switch voltage.
3-Primary side voltage
Please tell where is the problem. Thanking in anticipation.
Edit. I changed the voltage source and inductor to constant current source. But switch voltage is still rising. and it still has ripples. Please help
Welcome to ETO!
There is a lot of shoot-through current through the top and bottom FETs because of overlap in their Vgs drive waveforms. You need to avoid overlap and allow some dead-time.
The gate drive voltages are excessive and would fry the FETs in the real world.
Welcome to ETO!
There is a lot of shoot-through current through the top and bottom FETs because of overlap in their Vgs drive waveforms. You need to avoid overlap and allow some dead-time.
The gate drive voltages are excessive and would fry the FETs in the real world.
Welcome to ETO!
There is a lot of shoot-through current through the top and bottom FETs because of overlap in their Vgs drive waveforms. You need to avoid overlap and allow some dead-time.
The gate drive voltages are excessive and would fry the FETs in the real world.
I don't know what you are trying to build but this is a current fed full bridge boost circuit.
In your circuit: input is current I changed to voltage. ("current" = current in inductor)
Changed gate voltage from +/-30Vpk to +/-20V. (real world max voltage on G-S)
I also used a Pulse Voltage Source as input. This circuit wants to start up at zero volts. (initial condition problems)
I don't know what you are trying to build but this is a current fed full bridge boost circuit.
In your circuit: input is current I changed to voltage. ("current" = current in inductor)
Changed gate voltage from +/-30Vpk to +/-20V. (real world max voltage on G-S)
I also used a Pulse Voltage Source as input. This circuit wants to start up at zero volts. (initial condition problems)
I got the problem.. Rising of switch voltage is because of the RCD clamp circuit. But if I remove this then the stress voltage is too high across the switches.
Please help to solve this issue.
I got the problem.. Rising of switch voltage (Vds) is because of the RCD clamp circuit. But if I remove this then the stress voltage is too high across the switches.
Please help to solve this issue.
The "Constant Current" name comes from the constant current in L3.
Increased frequency, reduced the inductors/transformer size, New snubber, Use K1=0.995 for leakage inductance, changed D=0.64 to get 350V.