hi C,
You did post in an earlier post:
"The SPI interface gives access to the configuration register via a synchronous full_duplex protocol corresponding to CPOL=1 and CPHA=0 in Motorola/Freescale nomenclature. Only the slave side is implemented."
Which suggests a Clock High at rest, going low when clocked.
Your clip in #95 states
CPOL=0.
One of the statements is incorrect.
As the SPI works OK using CPOL=0 I would say the 1st statement is wrong.
E
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