I am trying to figure out what the differential impedance for a clock on DDR3 memory should be. The part number for the DDR3 I am referencing is W3J128M72G-1066PBI. It's a microsemi part with a 1066MB/s, so the clock is 533MHz.
The impedance of a transmission line (coax or PCB traces) should be some what independent of speed. Like watching TV on channel-2 or on channel-12; the transmission line is the same impedance.
I'm looking at a designs board file and see that they did not match the length of the diff pair. There is a delta of 3 mils. For some reason I remember .001" difference in trace length will create a 1 nano second difference between the positive and negative signals. Is that right?