That's what you would think intuitively, but that's not really how it works. That's because the capacitor voltage is zero when the current is zero, and although that is perfectly normal sometimes for a non sinusoidal excitation for a normal sinusoidal excitation after much time has passed it means the voltage is not yet in sync with the current. So what it looks like is that we had a sinusoidal excitation along with a non zero initial condition at t=0. And so the reason for the lack of a transient is only because there is no resistance in the circuit at all, which is also not realistic.The particular excitation chosen does not induce a transient because the initial part of a sine wave looks like a ramp...
Capacitors are driving me crazy when I'm learning the internal capacitances of a MOSFET! I didn't know that a capacitor has resistance! Where does it come from?First, notice is that if the current source is ideal, then the presence of a series resistance in the capacitor does not really matter. However, if the source resistance is finite, then the capacitor resistance can have an effect, although perhaps it will not be significant in many practical cases.
You could spend a lot of time studying this question and even very experienced electrical engineers don't know all there is to know about this. But to keep it simple, there is an effective series resistance and parallel resistance created by the dielectric material used. Air gap caps would have less of this effect and vacuum caps almost nothing. Then there is the effective series resistance of the leads/plates which is always present unless you make the cap out of superconducting material, which is not very typical.I didn't know that a capacitor has resistance! Where does it come from?
Nice work!For simplicity, I adopt MrAl's circuit version, but I've changed the elements values in order to see the voltage/current variations in a shorter time. I only do the sine excitation.
Current source: 1u*sin(200*pi*t), frequency=100Hz
C=10n F, initial voltage=0
R=1Mega Ω
(connecting the current source to the parallel combination of the resistor and the acp. circuit sketch is missing!)
After some lengthy calculations (I solved the circuit equation in time domain) the cap voltage is
v(t)=0.0247045*sin(200*pi*t)-0.155223*cos(200*pi*t)+0.155223*e^(-100*t)
It matches the simulation.
View attachment 88568
The upper is the capacitor current-time plot, the bottom is voltage-time.
Personally, I don't think it is impractical or artificial. It's just a case to look at. If you have a poor capacitor and a poor current source, then you will get fast decay of the offset voltage. If you have very good devices, you will see a much longer time before the decay is noticeable. But, yes you have shown that the initial response is not a pure sinusoidal function. It is only pure in the limit as the parallel resistance goes to infinity.As you can see, the current flowing through the cap isn't a pure sine wave at the very beginning in time. That's why I said " if I want to see a capacitor with zero initial voltage exhibit not only steady state response but also its transient state, the starting current flowing through it won't simply be a sine or cosine one." in post #3.
And that is why I think I set up an impractical, artificial condition: connecting a sine current source directly to a cap!
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