design review request: LM339 output abused?

Is there a risk of damage to the output of the comparators in this schematic? I was told there might be an issue with IC1A and IC1C due to discharging of the capacitors C1 and C2 when the comparator output turns low.
If so, how best to solve this issue without sacrificing the RC timing involved?

The LM339 output goes into current limit at some where in the 6 to 60mA range.
I have a data sheet from ST.COM. It shows directly driving a 0.5uF capacitor. Your 10uF is 20x larger.
If JP1 & JP2 were 1k resistors then the IC current would be much lower. It will take a little time to reset the capacitor. (10uF & 1k)

I have never had a reliability problem with 339 outputs discharging similar sized capacitors, but you are right to address the potential issue, especially if it comes up in a datasheet audit of the design.

Anything in series with pins 1 and 14 will have no effect on the charge-up time constant. Also, while an extra 100 ohms or 1K will create a voltage divider that increases the minimum voltage across the capacitors in the discharged state, that increase will be approx. 0.33%. This voltage increase effectively shortens the charge-up time constant to a trip-point value, but probably not enough to affect circuit operation. So the remaining question is: What is the maximum discharge time your system can tolerate? This will set the maximum resistor value, and hence the discharge current.

ak

Thanks for those views, they certainly helped me with this little project. A 12V supply and a 150R resistor will limit the peak discharge to 80mA, but since this is just a spike I am satisfied this will be enough of a safety margin.

TI recommends 20 ma max.