Duty Cycle in the range of 45-55%

[janetsmith2000@yahoo.com]

Hi,

Usually, when I want to use PIC to interface another IC, for the Clk or En pin of the device, I will send a Logic 1 and then followed by Logic 0 for each cycle.

for example,
output_high(PIN_STOP);
pulse();

where pulse is
void Pulse() {
output_high(PIN_B0),
delay_ms(100),
output_low(PIN_B0),
delay_ms(100),
}

In this way, I can get the job done, although the duty cycle of CLK pulse is not preserved.

Now I have to interface with an IC, which according to the datasheet,
CLK: The clock signal, coming from the external controller, must have a Duty Cycle within the Min/Max values defined by the specification (typically 50%).

What is the walkaround for this problem?

 

[upand_at_them]

I don't understand. What is the problem? Your pulse function does produce a 50% duty cycle.

Mike

 

[mstechca]

seems to me everything is ok. Is the oscillator driving the microcontroller damaged? if so, replace it.

Also, try attaching a pull-up resistor or a pull-down resistor to the CLK input. I made a microcontroller programmer and I had to use external pull-up resistors and pull-down resistors just to get the thing to work.

A resistor connected will turn a floating CLK input into wherever the resistor is connected to. so if resistor is to ground, then float = logic low. if resistor connects to VCC, then float = logic high.

 

[janetsmith2000@yahoo.com]

Problem is that,

The uC executes instructions in sequence. In between the pulses, I will add some other instructions, which will make the duty cycles, in worst case, out of the 45-55% range.

let's say, x is the time taken by other instructions,


Pulse(); // Clk = 1 for 100ms, Clk = 0 for 100ms,
Intructions for 40ms,
Pulse(); // Clk = 1 for 100ms, Clk = 0 for 100ms,

It ends up Clk = 0 for 100ms + 40 ms. so the duty cycle altered.

In another case, where ISR is introduced, duty cycle also affected.

 

[evandude]

it seems like the easiest workaround would be to try to use an interrupt to generate the clock pulses. if you could configure a timer to interrupt every 100mS (or whatever the clock pulse width should be) then you could do pretty much anything you wanted in your main code without affecting the clock duty cycle.

otherwise, you would have to adjust the delay times of the clock to include the extra code you added.

 

[Oznog]

it seems like the easiest workaround would be to try to use an interrupt to generate the clock pulses.

Or better yet use a PIC with a PWM module. Then you don't need to worry about interrupt response times or overhead. But you may not be able to do 100mS, this is a long period. On the other hand I can't think of any IC which would require a 100mS signal so maybe this example exagerates.