Flyback and Voltage mulitplier

[happyfpga]

Hello,

I post a question about flyback and voltage multiplier yesterday. Some experts asked for sch. I don't know how to modify the original thread, and setup a new thread with sch here.

I am build a flyback typed DC-DC to produce 1500VDC from 15VDC. The output current consumption is very low, <0.1mA. The DC-DC switching controller comes from TI, it is just an oscillator+MOSFET driver, the feedback is a resistor divider, switching freq is 300KHz. To reduce the stress on the MOSFET and easierf for the transformer design, I would like to produce 500V first, then use 3-stage voltage multiplier to get 1500V. Right now, I can get 500V properly with PSPICE, but the whole circuit failed after attaching the multiplier which is consist of fast diodes and capacitor.

Thanks for any advice!

 

[ronsimpson]

I can not see everything and I do not have p-spice.
Is your transformer 1:1 or 1:1000? It is hard to see.
When the FET is on there is about 15 volts across the transformer. What is the voltage across the transformer when the FET is open?
Can you send waveforms when the circuit is working? (no multiplier)

 

[happyfpga]

ronsimpson,

The transformer is 1:33. The voltage across the primary is 15V when the MOSFET is on. When it reaches to 500V (no multiplier), the duty cycle is 50%. Here are the waveform of the point at MOSFET(Drain).

 

[Blueteeth]

Voltage multiplier - Wikipedia, the free encyclopedia.

I realise those aren't for the output of flybacks, but the principle is the same.

Looks like your multiplier is slightly wrong... it can be drawn in many different ways, which confuses the hell out of me. So I just fiddled about in LTspice (similar to PSpice) and came up with this.

Note the size of the capacitors, this was because the switching frequency of my mock-up boost converter was about 60kHz ish..(I actually drew an entire circuit in LTspice, rather than give it PWM in instructions) A fifth of yours. Also, the capactior on the output, referenced to ground. I get a fairly decent clean output at just under 3x the output of the flyback alone. (about 97%)

Its not ideal but its to show the principle....its actually VERY similar to yours, just drawn differently.

Edit: As the feedback for your boost converter chip expects to be connected to a stable voltage voltage via voltage divider, you should probably add a small capacitor from the FB pin to gnd. As without the large output cap that a standard flyback has, it'll be pretty much an AC waveform. Or you jsut increase the value of C2. But that would require a higher voltage capacitor.

 

[happyfpga]

Thanks, Blueteeth!

The difference between your sch and mine is that the output capacitor referenced to gnd. Theoretically, both schematics should be correct. I am wondering that connecting the last cap to ground can make the circuit more stable?

Putting a cap on the feedback loop is really good idea and helpful.

 

[Blueteeth]

You're most welcome

As for values, I noticed in your original design you used 0.5nF caps. These seem quite small to me (500pf), even if your switching frequency is 300kHz and you're only drawing 0.1mA. I would start off with 10nF, and slowly decrease the value until the output drops beyond certain point. If you are building this then obviously high value caps will be much more expensive, but 2.2 - 10nF 1kV ceramic capacitors are plentiful and relatively cheap.

For the output cap, 100nF was just a standard value, as this will be across the highest voltage, it'll be the most expensive. This is why I love simulations, combination of theory, plus trial and error, can take the bulk of the experimental work out of a design.